diff options
author | Agustina Arzille <avarzille@riseup.net> | 2017-03-23 20:14:20 +0100 |
---|---|---|
committer | Richard Braun <rbraun@sceen.net> | 2017-05-09 21:15:13 +0200 |
commit | b5864f82b9c0d8ea2e825e7d86bd8cdeb825f870 (patch) | |
tree | 0da580e2122292587a4fc27d3210065499e565d0 | |
parent | 52142d9dfa885b944fc3a3835cf5a2894463339d (diff) |
x86/cpu: test for cmpxchg8b feature in 32 bits mode
-rw-r--r-- | arch/x86/machine/cpu.c | 12 | ||||
-rw-r--r-- | arch/x86/machine/cpu.h | 1 |
2 files changed, 13 insertions, 0 deletions
diff --git a/arch/x86/machine/cpu.c b/arch/x86/machine/cpu.c index ff7b7221..261e586e 100644 --- a/arch/x86/machine/cpu.c +++ b/arch/x86/machine/cpu.c @@ -538,6 +538,18 @@ cpu_check(const struct cpu *cpu) if (!(cpu->features2 & CPU_FEATURE2_APIC)) { cpu_panic_on_missing_feature("apic"); } + + /* + * The compiler is expected to produce cmpxchg8b instructions to + * perform 64-bits atomic operations on a 32-bits processor. Clang + * currently has trouble doing that so 64-bits atomic support is + * just disabled when building with it. + */ +#if !defined(__LP64__) && !defined(__clang__) + if (!(cpu->features2 & CPU_FEATURE2_CX8)) { + cpu_panic_on_missing_feature("cx8"); + } +#endif } void diff --git a/arch/x86/machine/cpu.h b/arch/x86/machine/cpu.h index 862799e8..3bf1ade3 100644 --- a/arch/x86/machine/cpu.h +++ b/arch/x86/machine/cpu.h @@ -69,6 +69,7 @@ #define CPU_FEATURE2_PSE 0x00000008 #define CPU_FEATURE2_PAE 0x00000040 #define CPU_FEATURE2_MSR 0x00000020 +#define CPU_FEATURE2_CX8 0x00000100 #define CPU_FEATURE2_APIC 0x00000200 #define CPU_FEATURE2_PGE 0x00002000 |