Move the DATA_ALIGN and TEXT_ALIGN macros to the x86/cpu module

8 files changed, 28 insertions, 21 deletions

diff --git a/arch/x86/machine/asm.h b/arch/x86/machine/asm.h
index 6118bb8..204d6fe 100644
--- a/arch/x86/machine/asm.h
+++ b/arch/x86/machine/asm.h
@@ -22,16 +22,16 @@
 #warning "asm.h included from a C file"
 #endif /* __ASSEMBLER__ */
 
-#include <machine/param.h>
+#include <machine/cpu.h>
 
 #define ASM_ENTRY(x)    \
-.align TEXT_ALIGN;      \
+.align CPU_TEXT_ALIGN;  \
 .global x;              \
 .type x, STT_FUNC;      \
 x:
 
 #define ASM_DATA(x)     \
-.align DATA_ALIGN;      \
+.align CPU_DATA_ALIGN;  \
 .global x;              \
 .type x, STT_OBJECT;    \
 x:
diff --git a/arch/x86/machine/boot.c b/arch/x86/machine/boot.c
index 72c5bb3..df7a206 100644
--- a/arch/x86/machine/boot.c
+++ b/arch/x86/machine/boot.c
@@ -77,8 +77,8 @@
 #include <vm/vm_kmem.h>
 #include <vm/vm_setup.h>
 
-char boot_stack[BOOT_STACK_SIZE] __aligned(DATA_ALIGN) __bootdata;
-char boot_ap_stack[BOOT_STACK_SIZE] __aligned(DATA_ALIGN) __bootdata;
+char boot_stack[BOOT_STACK_SIZE] __aligned(CPU_DATA_ALIGN) __bootdata;
+char boot_ap_stack[BOOT_STACK_SIZE] __aligned(CPU_DATA_ALIGN) __bootdata;
 unsigned int boot_ap_id __bootdata;
 
 #ifdef __LP64__
diff --git a/arch/x86/machine/cpu.c b/arch/x86/machine/cpu.c
index 83eaf90..6baff62 100644
--- a/arch/x86/machine/cpu.c
+++ b/arch/x86/machine/cpu.c
@@ -144,7 +144,7 @@ static struct cpu_gate_desc cpu_idt[CPU_IDT_SIZE] __aligned(8) __read_mostly;
  * memory.
  */
 static unsigned long cpu_double_fault_handler;
-static char cpu_double_fault_stack[TRAP_STACK_SIZE] __aligned(DATA_ALIGN);
+static char cpu_double_fault_stack[TRAP_STACK_SIZE] __aligned(CPU_DATA_ALIGN);
 
 void
 cpu_delay(unsigned long usecs)
diff --git a/arch/x86/machine/cpu.h b/arch/x86/machine/cpu.h
index 44d339c..0061e13 100644
--- a/arch/x86/machine/cpu.h
+++ b/arch/x86/machine/cpu.h
@@ -18,6 +18,8 @@
 #ifndef _X86_CPU_H
 #define _X86_CPU_H
 
+#include <limits.h>
+
 /*
  * L1 cache line size.
  *
@@ -26,6 +28,22 @@
 #define CPU_L1_SIZE 64
 
 /*
+ * Data alignment, normally the word size.
+ */
+#define CPU_DATA_ALIGN (LONG_BIT / 8)
+
+/*
+ * Function alignment.
+ *
+ * Aligning functions improves instruction fetching.
+ *
+ * Used for assembly functions only.
+ *
+ * XXX Use this value until processor selection is available.
+ */
+#define CPU_TEXT_ALIGN 16
+
+/*
  * Processor privilege levels.
  */
 #define CPU_PL_KERNEL   0
diff --git a/arch/x86/machine/param.h b/arch/x86/machine/param.h
index f8fe2c4..f9abaa4 100644
--- a/arch/x86/machine/param.h
+++ b/arch/x86/machine/param.h
@@ -25,17 +25,6 @@
 #include <kern/macros.h>
 
 /*
- * Code/data alignment.
- */
-#define TEXT_ALIGN  16
-
-#ifdef __LP64__
-#define DATA_ALIGN  8
-#else /* __LP64__ */
-#define DATA_ALIGN  4
-#endif /* __LP64__ */
-
-/*
  * System timer frequency.
  *
  * The selected value of 200 translates to a period of 5ms, small enough to
diff --git a/arch/x86/machine/trap.c b/arch/x86/machine/trap.c
index ee3153f..5950231 100644
--- a/arch/x86/machine/trap.c
+++ b/arch/x86/machine/trap.c
@@ -37,7 +37,7 @@
 #include <machine/trap.h>
 
 struct trap_cpu_data {
-    unsigned char intr_stack[TRAP_STACK_SIZE] __aligned(DATA_ALIGN);
+    unsigned char intr_stack[TRAP_STACK_SIZE] __aligned(CPU_DATA_ALIGN);
 };
 
 static struct trap_cpu_data trap_cpu_data __percpu;
diff --git a/arch/x86/x15.lds.S b/arch/x86/x15.lds.S
index bc7f480..b5400c4 100644
--- a/arch/x86/x15.lds.S
+++ b/arch/x86/x15.lds.S
@@ -69,7 +69,7 @@ SECTIONS
         *(.rodata)
     } : rodata
 
-    .notes ALIGN(DATA_ALIGN) : AT(BOOT_VTOP(ADDR(.notes))) {
+    .notes ALIGN(CPU_DATA_ALIGN) : AT(BOOT_VTOP(ADDR(.notes))) {
         *(.note.*)
     } : rodata
 
@@ -83,7 +83,7 @@ SECTIONS
         *(.data)
     } : data
 
-    .bss ALIGN(DATA_ALIGN) : AT(BOOT_VTOP(ADDR(.bss))) {
+    .bss ALIGN(CPU_DATA_ALIGN) : AT(BOOT_VTOP(ADDR(.bss))) {
         *(.bss)
     } : data
 
diff --git a/kern/thread.c b/kern/thread.c
index 7b186cb..785640c 100644
--- a/kern/thread.c
+++ b/kern/thread.c
@@ -2305,7 +2305,7 @@ thread_setup(void)
                     CPU_L1_SIZE, NULL, 0);
 #ifndef X15_THREAD_STACK_GUARD
     kmem_cache_init(&thread_stack_cache, "thread_stack", TCB_STACK_SIZE,
-                    DATA_ALIGN, NULL, 0);
+                    CPU_DATA_ALIGN, NULL, 0);
 #endif /* X15_THREAD_STACK_GUARD */
 
     thread_setup_reaper();