summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/xlnx/zynqmp_disp_regs.h
AgeCommit message (Collapse)Author
2024-12-19drm: xlnx: zynqmp_dpsub: Add DP audio supportTomi Valkeinen
Add basic DisplayPort audio support. Support non-live audio playback from two PCMs (DMA channels), and the volume control in the audio mixer. As older dtb files may not have the audio DMA channels defined, the driver will just mark the audio support as disabled if the audio DMA is missing, and will continue with only display support. Note: Reset doesn't seem to work (ZYNQMP_DISP_AUD_SOFT_RESET). If we do a reset, audio playback won't start again even if, afaics, we do set up all the necessary registers. So, at the moment, resetting the audio block in dp_dai_hw_free() is commented out. Tested-by: Anatoliy Klymenko <anatoliy.klymenko@amd.com> Reviewed-by: Vishal Sagar <vishal.sagar@amd.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> Link: https://patchwork.freedesktop.org/patch/msgid/20241023-xilinx-dp-audio-v4-3-5128881457be@ideasonboard.com
2024-04-24drm: xlnx: zynqmp_dpsub: Update live format definesAnatoliy Klymenko
Update live format defines to match DPSUB AV_BUF_LIVE_VID_CONFIG register layout. These defines were never referenced before, so no other changes required. Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Anatoliy Klymenko <anatoliy.klymenko@amd.com> Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240416-dp-live-fmt-v4-2-c7f379b7168e@amd.com
2020-07-18drm: xlnx: DRM/KMS driver for Xilinx ZynqMP DisplayPort SubsystemHyun Kwon
The Xilinx ZynqMP SoC has a hardened display pipeline named DisplayPort Subsystem. It includes a buffer manager, a video pipeline renderer (blender), an audio mixer and a DisplayPort source controller (transmitter). The DMA engine the provide data to the buffer manager, as well as the DisplayPort PHYs that drive the lanes, are external to the subsystem and interfaced using the DMA engine and PHY APIs respectively. This driver supports the DisplayPort Subsystem and implements - Two planes, for graphics and video - One CRTC that supports alpha blending - One encoder for the DisplayPort transmitter - One connector for an external monitor It currently doesn't support - Color keying - Test pattern generation - Audio - Live input from the Programmable Logic (FPGA) - Output to the Programmable Logic (FPGA) Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>