summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/i915/gt/gen2_engine_cs.h
AgeCommit message (Collapse)Author
2024-10-15drm/i915/gt: s/gen3/gen2/Ville Syrjälä
Now that we use the gen3 codepaths also for gen2 rename everything to gen2_ to match. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20241008214349.23331-3-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2024-10-15drm/i915/gt: Nuke gen2_irq_{enable,disable}()Ville Syrjälä
We've determined that accessing the (supposedly) 16bit interrupt registers on gen2 as 32bit works just fine. We already dropped the special case from the main interrupt code, do so also for the gt interrupt stuff. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20241008214349.23331-2-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2020-06-02drm/i915/gt: Split low level gen2-7 CS emittersChris Wilson
Pull the routines for writing CS packets out of intel_ring_submission into their own files. These are low level operations for building CS instructions, rather than the logic for filling the global ring buffer with requests, and we will want to reuse them outside of this context. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Acked-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200601072446.19548-2-chris@chris-wilson.co.uk