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path: root/drivers/gpu/drm/i915/display/intel_alpm.c
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2025-05-29drm/i915/alpm: Move port alpm configurationJouni Högander
It is specified in Bspec where port alpm configuration is supposed to be performed. Change accordingly. v2: - drop HAS reference - ensure PORT_ALPM registers are not writen on older platform Bspec: 68849 Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Link: https://lore.kernel.org/r/20250526120512.1702815-9-jouni.hogander@intel.com
2025-05-29drm/i915/alpm: Add new interface to check if AUXLess ALPM is usedJouni Högander
we need to know if AUXLess ALPM is used when preparing for link training. Add new interface for this and use it in existing code where possible. v2: remove kerneldoc comment Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Link: https://lore.kernel.org/r/20250526120512.1702815-8-jouni.hogander@intel.com
2025-05-29drm/i915/alpm: Write PR_ALPM_CTL registerJouni Högander
PR_ALPM_CTL register contains configurations related to Adaptive sync sdp. Configure these if Adaptive Sync SDP is supported. v2: avoid using hardcoded indices Bspec: 71014 Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Link: https://lore.kernel.org/r/20250526120512.1702815-6-jouni.hogander@intel.com
2025-05-14drm/i915/alpm: Stop writing ALPM registers when PSR is enabledJouni Högander
Currently we are seeing these on PTL: xe 0000:00:02.0: [drm] *ERROR* Timeout waiting for DDI BUF A to get active These seem to be caused by writing ALPM registers while Panel Replay is enabled. Fix this by writing ALPM registers only when Panel Replay is about to be enabled. v4: improve comment on intel_psr_panel_replay_enable_sink call v3: enable/disable ALPM from PSR code Fixes: 172757acd6f6 ("drm/i915/lobf: Add lobf enablement in post plane update") Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com> Link: https://lore.kernel.org/r/20250513054814.3702977-3-jouni.hogander@intel.com
2025-05-14drm/i915/alpm: Make intel_alpm_enable_sink available for PSRJouni Högander
We want to enable sink ALPM from PSR code. Make intel_alpm_enable_sink available for PSR. v2: do not add kerneldoc comments Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com> Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Link: https://lore.kernel.org/r/20250513054814.3702977-2-jouni.hogander@intel.com
2025-04-28drm/i915/alpm: Check for alpm support before accessing alpm registerAnimesh Manna
Currently, only EDP supports alpm. So, check for alpm support and prevent the DP connector from accessing the alpm register if doing so is unsupported. Fixes: acff6d6bded3 ("drm/i915/lobf: Add mutex for alpm update") Signed-off-by: Animesh Manna <animesh.manna@intel.com> Reviewed-by: Jonathan Cavitt <jonathan.cavitt@intel.com> Link: https://lore.kernel.org/r/20250425132107.2926759-1-animesh.manna@intel.com
2025-04-24drm/i915/display: Disintegrate sink alpm enable from psr with lobfAnimesh Manna
Make a generic alpm enable function for sink which can be used for PSR2/PR/Lobf. v1: Initial version. v2: Move code comment to intel_psr_needs_alpm(). [Jouni] Signed-off-by: Animesh Manna <animesh.manna@intel.com> Reviewed-by: Jouni Högander <jouni.hogander@intel.com> Link: https://lore.kernel.org/r/20250423092334.2294483-12-animesh.manna@intel.com
2025-04-24drm/i915/alpm: Add intel_psr_need_alpm() to simplify alpm checkAnimesh Manna
Simplify the alpm check which will be used multiple places like source configuration, sink enablement etc. Signed-off-by: Animesh Manna <animesh.manna@intel.com> Reviewed-by: Jouni Högander <jouni.hogander@intel.com> Link: https://lore.kernel.org/r/20250423092334.2294483-11-animesh.manna@intel.com
2025-04-24drm/i915/lobf: Check for sink error and disable LOBFAnimesh Manna
Disable LOBF/ALPM for any erroneous condition from sink side. v1: Initial version. v2: Add centralized alpm error handling. [Jouni] v3: Improve debug print. [Jouni] v4: Disable alpm permanently for sink error. [Jouni] Signed-off-by: Animesh Manna <animesh.manna@intel.com> Reviewed-by: Jouni Högander <jouni.hogander@intel.com> Link: https://lore.kernel.org/r/20250423092334.2294483-10-animesh.manna@intel.com
2025-04-24drm/i915/lobf: Add mutex for alpm updateAnimesh Manna
The ALPM_CTL can be updated from different context, so add mutex to sychonize the update. Signed-off-by: Animesh Manna <animesh.manna@intel.com> Reviewed-by: Jouni Högander <jouni.hogander@intel.com> Link: https://lore.kernel.org/r/20250423092334.2294483-9-animesh.manna@intel.com
2025-04-24drm/i915/lobf: Add debug interface for lobfAnimesh Manna
Add an interface in debugfs which will help in debugging LOBF feature. v1: Initial version. v2: - Remove FORCE_EN flag. [Jouni] - Change prefix from I915 to INTEL. [Jani] - Use u8 instead of bool for lobf-debug flag. [Jani] v3: - Use intel_connector instead of display. [Jani] - Remove edp connector check as it was already present in caller function. [Jani] - Remove loop of searching edp encoder which is directly accessible from intel_connector. [Jani] v4: - Simplify alpm debug to bool instead of bit-mask. [Jani] v5: - Remove READ_ONCE(). [Jani] - Modify variable name to *_disable_*. [Jouni] v6: Improved debug print. [Jouni] Signed-off-by: Animesh Manna <animesh.manna@intel.com> Reviewed-by: Jouni Högander <jouni.hogander@intel.com> Link: https://lore.kernel.org/r/20250423092334.2294483-8-animesh.manna@intel.com
2025-04-24drm/i915/lobf: Update lobf if any change in dependent parametersAnimesh Manna
For every commit the dependent condition for LOBF is checked and accordingly update has_lobf flag which will be used to update the ALPM_CTL register during commit. v1: Initial version. v2: Avoid reading h/w register without has_lobf check. [Jani] v3: Update LOBF in post plane update instead of separate function. [Jouni] v4: - Add lobf disable print. [Jouni] - Simplify condition check for enabling/disabling lobf. [Jouni] v5: Disable LOBF in pre_plane_update(). [Jouni] v6: use lobf flag of old_crtc_state and write 0 into ALPM_CTL. [Jouni] Signed-off-by: Animesh Manna <animesh.manna@intel.com> Reviewed-by: Jouni Högander <jouni.hogander@intel.com> Link: https://lore.kernel.org/r/20250423092334.2294483-7-animesh.manna@intel.com
2025-04-24drm/i915/lobf: Add fixed refresh rate check in compute_config()Animesh Manna
LOBF can be enabled with vrr fixed rate mode, so add check if vmin = vmax = flipline in compute_config(). Signed-off-by: Animesh Manna <animesh.manna@intel.com> Reviewed-by: Jouni Högander <jouni.hogander@intel.com> Link: https://lore.kernel.org/r/20250423092334.2294483-6-animesh.manna@intel.com
2025-04-24drm/i915/lobf: Disintegrate alpm_disable from psr_disableAnimesh Manna
Currently clearing of alpm registers is done through psr_disable() which is always not correct, without psr also alpm can exist. So dis-integrate alpm_disable() from psr_disable(). v1: Initial version. v2: - Remove h/w register read from alpm_disable(). [Jani] Signed-off-by: Animesh Manna <animesh.manna@intel.com> Reviewed-by: Jouni Högander <jouni.hogander@intel.com> Link: https://lore.kernel.org/r/20250423092334.2294483-5-animesh.manna@intel.com
2025-04-24drm/i915/lobf: Add debug print for LOBFAnimesh Manna
Lobf is enabled part of ALPM configuration and if has_lobf is set to true respective bit for LOBF will be set. Add debug print while setting the bitfield of LOBF. Signed-off-by: Animesh Manna <animesh.manna@intel.com> Reviewed-by: Jouni Högander <jouni.hogander@intel.com> Link: https://lore.kernel.org/r/20250423092334.2294483-4-animesh.manna@intel.com
2025-04-24drm/i915/lobf: Add lobf enablement in post plane updateAnimesh Manna
Enablement of LOBF is added in post plane update whenever has_lobf flag is set. As LOBF can be enabled in non-psr case as well so adding in post plane update. There is no change of configuring alpm with psr path. v1: Initial version. v2: Use encoder-mask to find the associated encoder from crtc-state. [Jani] v3: Remove alpm_configure from intel_psr.c. [Jouni] Signed-off-by: Animesh Manna <animesh.manna@intel.com> Reviewed-by: Jouni Högander <jouni.hogander@intel.com> Link: https://lore.kernel.org/r/20250423092334.2294483-3-animesh.manna@intel.com
2025-04-24drm/i915/alpm: use variable from intel_crtc_state instead of intel_psrJouni Högander
Currently code is making assumption that PSR is enabled when intel_alpm_configure is called. This doesn't work if alpm is configured before PSR is enabled. Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Animesh Manna <animesh.manna@intel.com> Signed-off-by: Animesh Manna <animesh.manna@intel.com> Link: https://lore.kernel.org/r/20250423092334.2294483-2-animesh.manna@intel.com
2024-12-18drm/i915/display: drop unnecessary i915_drv.h includesJani Nikula
Now that we don't include i915_drv.h via any headers from display, we can reliably remove unnecessary i915_drv.h includes and be sure they're not indirectly included. Add other includes where needed. v2: Fix 32-bit build Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20241217132147.2008057-1-jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2024-12-16drm/i915/uncore: add to_intel_uncore() and use itJani Nikula
Add to_intel_uncore() function to avoid the inclusion of i915_drv.h from intel_de.h. This reveals a number of implicit dependencies on i915_drv.h that need to be added. For now, to_intel_uncore() can be an inline function, with all the includes in compat intel_uncore.h, as long as i915_drv.h isn't included. The implicit dependencies on i915_drv.h is a problem in display code, but the same is not true for xe_device.h etc. Reviewed-by: Luca Coelho <luciano.coelho@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/377e2b400d126776224fc49874ed9cb03ac3123c.1732104170.git.jani.nikula@intel.com
2024-10-02drm/i915:Remove unused parameter in marcoHe Lugang
The parameter dev_priv is actually not used in macro PORT_ALPM_CTL and PORT_ALPM_LFPS_CTL,so remove it to simplify the code. Reviewed-by: Jani Nikula <jani.nikula@linux.intel.com> Signed-off-by: He Lugang <helugang@uniontech.com> Link: https://patchwork.freedesktop.org/patch/msgid/6C2E07E089F0CB73+20240925064016.733173-1-helugang@uniontech.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2024-09-05drm/i915/display: include media/cec-notifier.h and linux/debugfs.h where neededJani Nikula
Use a forward declaration for struct cec_notifier instead of including media/cec-notifier.h in intel_display_types.h, and only include it where needed. Also realize that a lot of places depend on including linux/debugfs.h via intel_display_types.h -> media/cec-notifier.h -> media/cec.h, and include that too where needed. v2: hsw_ips.c also needs debugfs.h (kernel test robot) Reviewed-by: Luca Coelho <luciano.coelho@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240827104521.4151471-1-jani.nikula@intel.com
2024-09-03drm/i915/display: Increase Fast Wake Sync length as a quirkJouni Högander
In commit "drm/i915/display: Increase number of fast wake precharge pulses" we were increasing Fast Wake sync pulse length to fix problems observed on Dell Precision 5490 laptop with AUO panel. Later we have observed this is causing problems on other panels. Fix these problems by increasing Fast Wake sync pulse length as a quirk applied for Dell Precision 5490 with problematic panel. Fixes: f77772866385 ("drm/i915/display: Increase number of fast wake precharge pulses") Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Closes: http://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9739 Closes: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/2246 Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11762 Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Cc: <stable@vger.kernel.org> # v6.10+ Link: https://patchwork.freedesktop.org/patch/msgid/20240902064241.1020965-3-jouni.hogander@intel.com
2024-08-16drm/i915/alpm: convert to struct intel_displayJani Nikula
Going forward, struct intel_display shall replace struct drm_i915_private as the main display device data pointer type. Convert intel_alpm.[ch] to struct intel_display. Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240813164123.2674462-4-jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2024-07-09drm/i915/display: Cache adpative sync caps to use it laterMitul Golani
Add new member to struct intel_dp to cache support of Adaptive Sync SDP capabilities and use it whenever required to avoid HW access to read capability during each atomic commit. -v2: - Squash both the patches Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com> Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240704082638.2302092-2-mitulkumar.ajitkumar.golani@intel.com Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2024-06-25drm/i915/alpm: Make crtc_state as const in intel_alpm_compute_paramsJouni Högander
Intel_alpm_compute_params doesn't change crtc_state. Let's convert it as const. Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Animesh Manna <animesh.manna@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240619062131.4021196-8-jouni.hogander@intel.com
2024-06-19intel_alpm: Fix wrong offset for PORT_ALPM_* registersJouni Högander
PORT_ALPM_* registers are using MMIO_TRANS2 macro. This is not correct as they are port register. Use _PORT_MMIO instead. Fixes: 4ee30a448255 ("drm/i915/alpm: Add ALPM register definitions") Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Animesh Manna <animesh.manna@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240618053026.3268759-10-jouni.hogander@intel.com
2024-06-19drm/i915/alpm: Fix port clock usage in AUX Less wake time calculationJouni Högander
Port clock is link rate in 10 kbit/s units. Take this into account when calculating AUX Less wake time. Fixes: da6a9836ac09 ("drm/i915/psr: Calculate aux less wake time") Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Animesh Manna <animesh.manna@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240618053026.3268759-4-jouni.hogander@intel.com
2024-06-11drm/i915/alpm: Share alpm support checks with PSR codeJouni Högander
Convert intel_alpm_aux_wake_supported and intel_alpm_aux_less_wake_supported as non-static. Use them in intel_psr.c instead of local variables. Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Animesh Manna <animesh.manna@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240607134917.1327574-8-jouni.hogander@intel.com
2024-06-11drm/i915/alpm: Write also AUX Less Wake lines into ALPM_CTLJouni Högander
Currently AUX Less Wake lines are not written into ALPM_CTL. Fix this. Fixes: 1ccbf135862b ("drm/i915/psr: Enable ALPM on source side for eDP Panel replay") Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Animesh Manna <animesh.manna@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240607134917.1327574-3-jouni.hogander@intel.com
2024-06-11drm/i915/alpm: Do not use fast_wake_lines for aux less wake timeJouni Högander
We want to have own variables for fast wake lines and aux less wake time. It might be needed to choose if we can enable Panel Replay Selective Update or PSR2. Also currently aux less wake time is overwritten by calculated fast wake time. v2:use aux less wake time in intel_alpm_lobf_compute_config Fixes: da6a9836ac09 ("drm/i915/psr: Calculate aux less wake time") Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Animesh Manna <animesh.manna@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240607134917.1327574-2-jouni.hogander@intel.com
2024-05-31drm/i915/alpm: Add debugfs for LOBFAnimesh Manna
For validation purpose add debugfs for LOBF. v1: Initial version. v2: Add aux-wake/less info along with lobf status. [Jouni] Reviewed-by: Jouni Högander <jouni.hogander@intel.com> Signed-off-by: Animesh Manna <animesh.manna@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240529200742.1694401-7-animesh.manna@intel.com
2024-05-31drm/i915/alpm: Enable lobf from source in ALPM_CTLAnimesh Manna
Set the Link Off Between Frames Enable bit in ALPM_CTL register. Note: Lobf need to be enabled adaptive sync fixed refresh mode where vmin = vmax = flipline, which will arise after cmmr feature enablement. Will add enabling sequence in a separate patch. v1: Initial version. v2: Condition check modified in alpm_configure(). [Jouni] Reviewed-by: Jouni Högander <jouni.hogander@intel.com> Signed-off-by: Animesh Manna <animesh.manna@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240529200742.1694401-6-animesh.manna@intel.com
2024-05-31drm/i915/alpm: Add compute config for lobfAnimesh Manna
Link Off Between Active Frames, is a new feature for eDP that allows the panel to go to lower power state after transmission of data. This is a feature on top of ALPM, AS SDP. Add compute config during atomic-check phase. v1: RFC version. v2: Add separate flag for auxless-alpm. [Jani] v3: - intel_dp->lobf_supported replaced with crtc_state->has_lobf. [Jouni] - Add DISPLAY_VER() check. [Jouni] - Modify function name of get_aux_less_status. [Jani] v4: Add enum alpm_mode to hold the aux-wake/less capability. v5: Add alpm_dpcd to intel_dp and use aux_wake_supported()/ aux_less_wake_supported() instead of enum alpm_mode. [Jouni] Reviewed-by: Jouni Högander <jouni.hogander@intel.com> Signed-off-by: Animesh Manna <animesh.manna@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240529200742.1694401-5-animesh.manna@intel.com
2024-05-31drm/i915/alpm: Move alpm related code to a new fileAnimesh Manna
Move ALPM feature related code as it will be used for non-psr panel also thorugh LOBF feature. v1: Initial version. v2: Correct ordering in makefile. [Jani] Reviewed-by: Jouni Högander <jouni.hogander@intel.com> Signed-off-by: Animesh Manna <animesh.manna@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240529200742.1694401-3-animesh.manna@intel.com
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