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path: root/drivers/gpu/drm/i915/display/icl_dsi.c
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2025-06-23Merge tag 'drm-intel-next-2025-06-18' of ↵Dave Airlie
https://gitlab.freedesktop.org/drm/i915/kernel into drm-next drm/i915 feature pull for v6.17: Features and functionality: - Add support for DSC fractional link bpp on DP MST (Imre) - Add support for simultaneous Panel Replay and Adaptive Sync (Jouni) - Add support for PTL+ double buffered LUT registers (Chaitanya, Ville) - Add PIPEDMC event handling in preparation for flip queue (Ville) Refactoring and cleanups: - Rename lots of DPLL interfaces to unify them (Suraj) - Allocate struct intel_display dynamically (Jani) - Abstract VLV IOSF sideband better (Jani) - Use str_true_false() helper (Yumeng Fang) - Refactor DSB code in preparation for flip queue (Ville) - Use drm_modeset_lock_assert_held() instead of open coding (Luca) - Remove unused arg from skl_scaler_get_filter_select() (Luca) - Split out a separate display register header (Jani) - Abstract DRAM detection better (Jani) - Convert LPT/WPT SBI sideband to struct intel_display (Jani) Fixes: - Fix DSI HS command dispatch with forced pipeline flush (Gareth Yu) - Fix BMG and LNL+ DP adaptive sync SDP programming (Ankit) - Fix error path for xe display workqueue allocation (Haoxiang Li) - Disable DP AUX access probe where not required (Imre) - Fix DKL PHY access if the port is invalid (Luca) - Fix PSR2_SU_STATUS access on ADL+ (Jouni) - Add sanity checks for porch and sync on BXT/GLK DSI (Ville) DRM core changes: - Change AUX DPCD access probe address (Imre) - Refactor EDID quirks, amd make them available to drivers (Imre) - Add quirk for DPCD access probe (Imre) - Add DPCD definitions for Panel Replay capabilities (Jouni) Merges: - Backmerges to sync with v6.15-rcs and v6.16-rc1 (Jani) Signed-off-by: Dave Airlie <airlied@redhat.com> From: Jani Nikula <jani.nikula@intel.com> Link: https://lore.kernel.org/r/fff9f231850ed410bd81b53de43eff0b98240d31@intel.com
2025-06-11drm/i915/panel: register drm_panel and call prepare/unprepare for ICL+ DSIJani Nikula
Allocate and register a drm_panel so that drm_panel_followers can find the panel. Pass the drm_connector::kdev device to drm_panel allocation for matching. That's only available after drm_sysfs_connector_add(), so we need to postpone the drm_panel allocation until .late_register() hook. The drm_panel framework is moving towards devm_drm_panel_alloc(). It requires a wrapper struct, and struct intel_panel would be the natural candidate. However, we can't postpone its allocation until .late_register(), so we have to use __devm_drm_panel_alloc() directly for now. Call the drm_panel_prepare() and drm_panel_unprepare() functions for ICL+ DSI, so that followers get notified of the panel power state changes. This can later be expanded to VLV+ DSI and eDP. Cc: Maxime Ripard <mripard@kernel.org> Cc: Heikki Krogerus <heikki.krogerus@linux.intel.com> Cc: Lee Shawn C <shawn.c.lee@intel.com> Tested-by: Lee Shawn C <shawn.c.lee@intel.com> Reviewed-by: Maxime Ripard <mripard@kernel.org> Link: https://lore.kernel.org/r/13d15c1414e65ffb21944d66e2820befdab54e98.1749199013.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-06-09drm/i915: split out display register macros to a separate fileJani Nikula
This is a scripted split of the display related register macros from i915_reg.h to display/intel_display_regs.h. As a starting point, move all the macros that are only used in display code (or GVT). If there are users in core i915 code or soc/, or no users anywhere, keep the macros in i915_reg.h. This is done in groups of macros separated by blank lines, moving the comments along with the groups. Some manually picked macro groups are kept/moved regardless of the heuristics above. This is obviously a very crude approach. It's not perfect. But there are 4.2k lines in i915_reg.h, and its refactoring has ground to a halt. This is the big hammer that splits the file to two, and enables further cleanup. Cc: Suraj Kandpal <suraj.kandpal@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Lucas De Marchi <lucas.demarchi@intel.com> Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com> # v2 Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Link: https://lore.kernel.org/r/20250606102256.2080073-1-jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-05-20drm/i915/dpll: Rename intel_shared_dpllSuraj Kandpal
Rename intel_shared_dpll to intel_dpll to represent both shared and individual dplls. Since from MTL each PHY has it's own PLL making the shared PLL naming a little outdated. In an effort to make this framework accepting of future changes this needs to be done. --v2 -Use intel_dpll_global to make sure names start with the filename [Jani/Ville] -Explain the need of this rename [Jani] --v3 -Just keep it intel_dpll [Jani] --v4 -Fix comment [Jani] -Use just num_dpll and dplls [Jani] Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Link: https://lore.kernel.org/r/20250515071801.2221120-7-suraj.kandpal@intel.com
2025-05-16drm/i915/dsi: Enforce pipeline flush with DSI HS transferGareth Yu
With all of the boundary conditions when streaming the commands B2B in our validation (part of the reason we added the flush), the Flush effectively serializes the transmission of each command enqueued within the command dispatcher to one per V. Blank line which simplifies the behavior of the High Speed Arbitration. So, unless we absolutely have to burst these to the Sink, we should be using the Pipeline Flush bit to serialize the commands. Bspec: 19742, 50193 Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14247 Cc: Suraj Kandpal <suraj.kandpal@intel.com> Cc: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Gareth Yu <gareth.yu@intel.com> Link: https://lore.kernel.org/r/20250509092539.763389-1-gareth.yu@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-04-09drm/i915/dsi: unify naming and simplify checks for dphy paramsJani Nikula
Unify the naming of the data and clock lane timing parameters, and simplify their bounds checks. Drop the debug messages on out of bounds parameters as excessive. Clarify the comment while at it. Cc: William Tseng <william.tseng@intel.com> Reviewed-by: William Tseng <william.tseng@intel.com> Tested-by: William Tseng <william.tseng@intel.com> Link: https://lore.kernel.org/r/d1a75ae7b9d93a0b50976b5de45ba2ca798991ad.1743682608.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-04-09drm/i915/dsi: separate clock and data lane prepare timingJani Nikula
The history of why the max of VBT clock and data lane prepare timing parameter is used for both instead of each individually is unknown. Separate them to follow what the Windows driver does. Cc; William Tseng <william.tseng@intel.com> Reviewed-by: William Tseng <william.tseng@intel.com> Tested-by: William Tseng <william.tseng@intel.com> Link: https://lore.kernel.org/r/079a26d0aae79f299aee0397dad2d6519cd55071.1743682608.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-04-01drm/i915: reduce intel_wakeref.h dependenciesJani Nikula
Forward declare struct drm_printer instead of including drm/drm_print.h, as we only need the pointer. Turns out quite a few places depend on this include implicitly. Make them explicit. Some of the includes are just stale and unnecessary. Group the forward declarations together while at it. Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://lore.kernel.org/r/20250326115452.2090275-1-jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-03-27drm/i915/dsi: let HW maintain the HS-TRAIL timingWilliam Tseng
This change is to avoid over-specification of the TEOT timing parameter, which is derived from software in current design. Supposed that THS-TRAIL and THS-EXIT have the minimum values, i.e., 60 and 100 in ns. If SW is overriding the HW default, the TEOT value becomes 150 ns, approximately calculated by the following formula. DIV_ROUND_UP(60/50)*50 + DIV_ROUND_UP(100/50))*50/2, where 50 is LP Escape Clock time in ns. The TEOT value 150 ns is larger than the maximum value, around 136 ns if UI is 1.8ns, (105 ns + 12*UI, defined by MIPI DPHY specification). However, the TEOT value will meet the specification if THS-TRAIL is set to the HW default, instead of software overriding. The timing change is made for both data lane and clock lane. v1: initial version. v2: change clock lane dphy timings. v3: remove calculation of trail cnt. v4: rebase. Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13891 Cc: Ville Syrjala <ville.syrjala@linux.intel.com> Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Vandita Kulkarni <vandita.kulkarni@intel.com> Cc: Lee Shawn C <shawn.c.lee@intel.com> Cc: Cooper Chiou <cooper.chiou@intel.com> Signed-off-by: William Tseng <william.tseng@intel.com> Acked-by: Vandita Kulkarni <vandita.kulkarni@intel.com> Link: https://lore.kernel.org/r/20250311100626.533888-1-william.tseng@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-02-28Merge drm/drm-next into drm-intel-nextJani Nikula
Sync to fix conlicts between drm-xe-next and drm-intel-next. Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-02-27drm/i915/pfit: rename intel_panel_fitting() to intel_pfit_compute_config()Jani Nikula
Unify naming wrt both the prefix and suffix. Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/33bb513e186c8838acde37f87aee732b63bd5702.1740564009.git.jani.nikula@intel.com
2025-02-27Merge tag 'drm-intel-next-2025-02-24' of ↵Dave Airlie
https://gitlab.freedesktop.org/drm/i915/kernel into drm-next drm/i915 feature pull for v6.15: Features and functionality: - Enable DP 128b/132b SST DSC (Jani, Imre) - Allow DSB to perform commits when VRR is enabled (Ville) - Compute HDMI PLLs for SNPS/C10 PHYs for rates not in fixed tables (Ankit) - Allow DSB usage when PSR is enabled on LNL+ (Jouni) - Enable Panel Replay mode change without full modeset (Jouni) - Enable async flips with compressed buffers on ICL+ (Ville) - Support luminance based brightness control via DPCD for eDP (Suraj) - Enable VRR enable/disable without full modeset (Mitul, Ankit) - Add debugfs facility for force testing HDCP 1.4 (Suraj) - Add scaler tracepoints, improve plane tracepoints (Ville) - Improve DMC wakelock debugging facilities (Gustavo) - Allow GuC SLPC default strategies on MTL+ for performance (Rodrigo) - Provide more information on display faults (Ville) Refactoring and cleanups: - Continue conversions to struct intel_display (Ville, Jani, Suraj, Imre) - Joiner and Y plane reorganization (Ville) - Move HDCP debugfs to intel_hdcp.c (Jani) - Clean up and unify LSPCON interfaces (Jani) - Move code out of intel_display.c to reduce its size (Ville) - Clean up and simplify DDI port enabling/disabling (Imre) - Make LPT LP a dedicated PCH type, refactor (Jani) - Simplify DSC range BPG offset calculation (Ankit) - Scaler cleanups (Ville) - Remove unused code from GVT (David Alan Gilbert) - Improve plane debugging (Ville) - DSB and VRR refactoring (Ville) Fixes: - Check if vblank is sufficient for DSC prefill and scaler (Mitul) - Fix Mesa clear color alignment regression (Ville) - Add missing TC DP PHY lane stagger delay (Imre) - Fix DSB + VRR usage for PTL+ (Ville) - Improve robustness of display VT-d workarounds (Ville) - Fix platforms for dbuf tracker state service programming (Ravi) - Fix DMC wakelock support conditions (Gustavo) - Amend DMC wakelock register ranges (Gustavo) - Disable the Common Primary Timing Generator (CMTG) (Gustavo) - Enable C20 PHY SSC (Suraj) - Add workaround for DKL PHY DP mode write (Nemesa) - Fix build warnings on clamp() usage (Guenter Roeck, Ankit) - Fix error handling while adding a connector (Imre) - Avoid full modeset at probe on vblank delay mismatches (Ville) - Fix encoder HDMI check for HDCP line rekeying (Suraj) - Fix HDCP repeater authentication during topology change (Suraj) - Handle display PHY power state reset for power savings (Mika) - Fix typos all over the place (Nitin) - Update HDMI TMDS C20 parameters for various platforms (Dnyaneshwar) - Guarantee a minimum hblank time for 128b/132b and 8b/10b MST (Arun, Imre) - Do not hardcode LSPCON settle timeout (Giedrius Statkevičius) Xe driver changes: - Re-use display vmas when possible (Maarten) - Remove double pageflip (Maarten) - Enable DP tunneling (Imre) - Separate i915 and xe tracepoints (Ville) DRM core changes: - Increase DPCD eDP display control CAP size to 5 bytes (Suraj) - Add DPCD eDP version 1.5 definition (Suraj) - Add timeout parameter to drm_lspcon_set_mode() (Giedrius Statkevičius) Merges: - Backmerge drm-next (Jani) Signed-off-by: Dave Airlie <airlied@redhat.com> From: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/87h64j7b7n.fsf@intel.com
2025-02-25Merge tag 'v6.14-rc4' into drm-nextDave Airlie
Backmerge Linux 6.14-rc4 at the request of tzimmermann so misc-next can base on rc4. Signed-off-by: Dave Airlie <airlied@redhat.com>
2025-02-17drm/i915/dsi: Use TRANS_DDI_FUNC_CTL's own port width macroImre Deak
The format of the port width field in the DDI_BUF_CTL and the TRANS_DDI_FUNC_CTL registers are different starting with MTL, where the x3 lane mode for HDMI FRL has a different encoding in the two registers. To account for this use the TRANS_DDI_FUNC_CTL's own port width macro. Cc: <stable@vger.kernel.org> # v6.5+ Fixes: b66a8abaa48a ("drm/i915/display/mtl: Fill port width in DDI_BUF_/TRANS_DDI_FUNC_/PORT_BUF_CTL for HDMI") Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250214142001.552916-2-imre.deak@intel.com (cherry picked from commit 76120b3a304aec28fef4910204b81a12db8974da) Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2025-02-14drm/i915/dsi: Use TRANS_DDI_FUNC_CTL's own port width macroImre Deak
The format of the port width field in the DDI_BUF_CTL and the TRANS_DDI_FUNC_CTL registers are different starting with MTL, where the x3 lane mode for HDMI FRL has a different encoding in the two registers. To account for this use the TRANS_DDI_FUNC_CTL's own port width macro. Cc: <stable@vger.kernel.org> # v6.5+ Fixes: b66a8abaa48a ("drm/i915/display/mtl: Fill port width in DDI_BUF_/TRANS_DDI_FUNC_/PORT_BUF_CTL for HDMI") Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250214142001.552916-2-imre.deak@intel.com
2025-02-13drm/i915/combo-phy: convert intel_combo_phy.[ch] to struct intel_displayJani Nikula
Going forward, struct intel_display is the main display device data pointer. Convert as much as possible of intel_combo_phy.[ch] to struct intel_display, along with intel_phy_is_combo() in intel_display.c. Drive-by convert some drm_dbg() to drm_dbg_kms() while at it. Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/c2e0a6294a8eaa4c16632881edc4f2d23c576101.1739378096.git.jani.nikula@intel.com
2025-02-13drm/i915/dsi: convert platform checks to display->platform.<platform> styleJani Nikula
These are stragglers from a time the display->platform mechanism didn't exist. Finish the conversion. Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/493e4c550f9c515e2e82df1afd8a74a24156e76e.1739378096.git.jani.nikula@intel.com
2025-02-13drm/i915/display: convert intel_cpu_transcoder_mode_valid() to intel_displayJani Nikula
Going forward, struct intel_display is the main display device data pointer. Convert the intel_cpu_transcoder_mode_valid()() helper to struct intel_display, allowing further conversions elsewhere. Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/f9246a00a2e7aabaffb86f863915a4307e1fd3f8.1739378095.git.jani.nikula@intel.com
2025-02-10drm/i915: Convert intel_display_power_{get,put}*() to intel_displayVille Syrjälä
Pass intel_display to the display power stuff. These are spread all over the place so tend to hinder clean conversions of whole files. TODO: The gt part/unpark power domain shenanigans need some kind of more abstract interface... v2: Deal with cmtg Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250206185533.32306-7-ville.syrjala@linux.intel.com
2025-02-06Merge drm/drm-next into drm-misc-nextMaxime Ripard
Bring rc1 to start the new release dev. Signed-off-by: Maxime Ripard <mripard@kernel.org>
2025-01-23drm/i915/display: fix typos in i915/display filesNitin Gote
Fix all typos in files under drm/i915/display reported by codespell tool. v2: - Include british and american spelling, as those are not typos. - Fix commenting style. <Jani> v3: Fix "In case" wrongly capitalized and also fix comment style. <Krzysztof Niemiec> Signed-off-by: Nitin Gote <nitin.r.gote@intel.com> Reviewed-by: Krzysztof Niemiec <krzysztof.niemiec@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250120081517.3237326-8-nitin.r.gote@intel.com Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2025-01-07drm/connector: make mode_valid take a const struct drm_display_modeDmitry Baryshkov
The mode_valid() callbacks of drm_encoder, drm_crtc and drm_bridge take a const struct drm_display_mode argument. Change the mode_valid callback of drm_connector to also take a const argument. Acked-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Liviu Dudau <liviu.dudau@arm.com> Reviewed-by: Raphael Gallais-Pou <rgallaispou@gmail.com> Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Lyude Paul <lyude@redhat.com> Reviewed-by: Maxime Ripard <mripard@kernel.org> Reviewed-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20241214-drm-connector-mode-valid-const-v2-5-4f9498a4c822@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2024-12-16drm/i915/uncore: add to_intel_uncore() and use itJani Nikula
Add to_intel_uncore() function to avoid the inclusion of i915_drv.h from intel_de.h. This reveals a number of implicit dependencies on i915_drv.h that need to be added. For now, to_intel_uncore() can be an inline function, with all the includes in compat intel_uncore.h, as long as i915_drv.h isn't included. The implicit dependencies on i915_drv.h is a problem in display code, but the same is not true for xe_device.h etc. Reviewed-by: Luca Coelho <luciano.coelho@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/377e2b400d126776224fc49874ed9cb03ac3123c.1732104170.git.jani.nikula@intel.com
2024-11-06drm/i915/display: Prepare for dsc 3 stream splitterAnkit Nautiyal
At the moment dsc_split represents whether the dsc splitter is used or not. With 3 DSC engines, the splitter can split into two streams or three streams. Instead of representing the splitter's state, it is more effective to represent the number of DSC streams per pipe. Replace the `dsc.dsc_split` member with `dsc.num_streams` to indicate the number of DSC streams used per pipe. This change will implicitly convey the splitter's operation mode. v2: Avoid new enum for dsc split. (Suraj) v3: -Replace dsc_split with num_stream. (Suraj) -Avoid extra parentheses. (Jani) v4: Set num_streams to 1, if VDSC_JOINER not set while readout. Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20241030041036.1238006-3-ankit.k.nautiyal@intel.com
2024-10-30drm/i915/dsi: convert to struct intel_displayJani Nikula
struct intel_display will replace struct drm_i915_private as the main device pointer for display code. Switch ICL DSI code over to it. Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/f62a3616ef15e02cf19c5d041656fc6e09b37f6a.1730146000.git.jani.nikula@intel.com
2024-10-23drm/i915/pfit: Extract intel_pfit.cVille Syrjälä
The panel fitter code doesn't really have much to do with the rest of intel_panel.c, so extract it all into its own file. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20241016143134.26903-9-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2024-09-05drm/i915/display: include drm/drm_probe_helper.h where neededJani Nikula
Stop including drm/drm_probe_helper.h in intel_display_types.h and only include it where needed. Reviewed-by: Luca Coelho <luciano.coelho@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/88f565495763d0f31a84f31059ab3b01af9bf2b9.1724689818.git.jani.nikula@intel.com
2024-08-12drm/i915/bios: convert to struct intel_displayJani Nikula
Going forward, struct intel_display shall replace struct drm_i915_private as the main display device data pointer type. Convert intel_bios.[ch] to struct intel_display. Do one drive-by conversion of unnecessary hex usage to decimal. Reviewed-by: Imre Deak <imre.deak@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/0d0261a53aff5f141b16b482222a5ffce78e176e.1723213547.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2024-08-06drm/i915: Replace to_bpp_int() with fxp_q4_to_int()Imre Deak
Replace the to_bpp_int() helper defined by the driver with the equivalent fxp_q4_to_int() helper defined by DRM core. v2: Rebase on the s/drm_x16/fxp_q4 change. Acked-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240805150802.3568970-3-imre.deak@intel.com
2024-06-07drm/i915: pass dev_priv explicitly to TRANS_DDI_FUNC_CTL2Jani Nikula
Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the TRANS_DDI_FUNC_CTL2 register macro. Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/2b61bf9c1f74ae633c99aa34fbf1aa85735cc5b6.1717514638.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2024-06-07drm/i915: pass dev_priv explicitly to TRANS_DDI_FUNC_CTLJani Nikula
Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the TRANS_DDI_FUNC_CTL register macro. Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/4ccf75561aa0fb209fd71c85e9089b0350570fd6.1717514638.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2024-06-07drm/i915: pass dev_priv explicitly to TRANSCONFJani Nikula
Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the TRANSCONF register macro. Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/9afc96be1cbe4514cdca701ab434b4c7aa3a55ba.1717514638.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2024-06-07drm/i915: pass dev_priv explicitly to TRANS_VSYNCSHIFTJani Nikula
Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the TRANS_VSYNCSHIFT register macro. Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/8103a31fbf6da725e6aed3bb86c15bbd581164fb.1717514638.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2024-06-07drm/i915: pass dev_priv explicitly to TRANS_VSYNCJani Nikula
Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the TRANS_VSYNC register macro. Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/eed30cb59cc45955a88cdf951023b0e695095760.1717514638.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2024-06-07drm/i915: pass dev_priv explicitly to TRANS_VBLANKJani Nikula
Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the TRANS_VBLANK register macro. Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/c33739ac6f26105fd1ad79b0027b6626e241c7bc.1717514638.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2024-06-07drm/i915: pass dev_priv explicitly to TRANS_VTOTALJani Nikula
Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the TRANS_VTOTAL register macro. Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/751bc7046f5e2c5fc6a4fe5ade2e836c641abdb7.1717514638.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2024-06-07drm/i915: pass dev_priv explicitly to TRANS_HSYNCJani Nikula
Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the TRANS_HSYNC register macro. Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/d387281470c9b677adb659b80fa3385df2faca99.1717514638.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2024-06-07drm/i915: pass dev_priv explicitly to TRANS_HTOTALJani Nikula
Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the TRANS_HTOTAL register macro. Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/4bdba7417341782b74b89753b7db7fdc3edf932c.1717514638.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2024-03-15drm/i915/dsi: Use enc_to_intel_dsi()Ville Syrjälä
Use enc_to_intel_dsi() instead hand rolling it. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240307151810.24208-2-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2024-03-07drm/i915/dsi: Go back to the previous INIT_OTP/DISPLAY_ON order, mostlyVille Syrjälä
Reinstate commit 88b065943cb5 ("drm/i915/dsi: Do display on sequence later on icl+"), for the most part. Turns out some machines (eg. Chuwi Minibook X) really do need that updated order. It is also the order the Windows driver uses. However we can't just undo the revert since that would again break Lenovo 82TQ. After staring at the VBT sequences for both machines I've concluded that the Lenovo 82TQ sequences look somewhat broken: - INIT_OTP is not present at all - what should be in INIT_OTP is found in DISPLAY_ON - what should be in DISPLAY_ON is found in BACKLIGHT_ON (along with the actual backlight stuff) The Chuwi Minibook X on the other hand has a full complement of sequences in its VBT. So let's try to deal with the broken sequences in the Lenovo 82TQ VBT by simply swapping the (non-existent) INIT_OTP sequence with the DISPLAY_ON sequence. Thus we execute DISPLAY_ON when intending to execute INIT_OTP, and execute nothing at all when intending to execute DISPLAY_ON. That should be 100% equivalent to the revert, for such broken VBTs. Cc: stable@vger.kernel.org Fixes: dc524d05974f ("Revert "drm/i915/dsi: Do display on sequence later on icl+"") References: https://gitlab.freedesktop.org/drm/intel/-/issues/10071 Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/10334 Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240305083659.8396-1-ville.syrjala@linux.intel.com Acked-by: Jani Nikula <jani.nikula@intel.com>
2024-01-17Revert "drm/i915/dsi: Do display on sequence later on icl+"Ville Syrjälä
This reverts commit 88b065943cb583e890324d618e8d4b23460d51a3. Lenovo 82TQ is unhappy if we do the display on sequence this late. The display output shows severe corruption. It's unclear if this is a failure on our part (perhaps something to do with sending commands in LP mode after HS /video mode transmission has been started? Though the backlight on command at least seems to work) or simply that there are some commands in the sequence that are needed to be done earlier (eg. could be some DSC init stuff?). If the latter then I don't think the current Windows code would work either, but maybe this was originally tested with an older driver, who knows. Root causing this fully would likely require a lot of experimentation which isn't really feasible without direct access to the machine, so let's just accept failure and go back to the original sequence. Cc: stable@vger.kernel.org Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/10071 Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240116210821.30194-1-ville.syrjala@linux.intel.com Acked-by: Jani Nikula <jani.nikula@intel.com>
2023-11-29drm/i915: Skip some timing checks on BXT/GLK DSI transcodersVille Syrjälä
Apparently some BXT/GLK systems have DSI panels whose timings don't agree with the normal cpu transcoder hblank>=32 limitation. This is perhaps fine as there are no specific hblank/etc. limits listed for the BXT/GLK DSI transcoders. Move those checks out from the global intel_mode_valid() into into connector specific .mode_valid() hooks, skipping BXT/GLK DSI connectors. We'll leave the basic [hv]display/[hv]total checks in intel_mode_valid() as those seem like sensible upper limits regardless of the transcoder used. Cc: stable@vger.kernel.org Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/9720 Fixes: 8f4b1068e7fc ("drm/i915: Check some transcoder timing minimum limits") Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20231127145028.4899-1-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2023-11-14drm/i915/display: Store compressed bpp in U6.4 formatAnkit Nautiyal
DSC parameter bits_per_pixel is stored in U6.4 format. The 4 bits represent the fractional part of the bpp. Currently we use compressed_bpp member of dsc structure to store only the integral part of the bits_per_pixel. To store the full bits_per_pixel along with the fractional part, compressed_bpp is changed to store bpp in U6.4 formats. Intergral part is retrieved by simply right shifting the member compressed_bpp by 4. v2: -Use to_bpp_int, to_bpp_frac_dec, to_bpp_x16 helpers while dealing with compressed bpp. (Suraj) -Fix comment styling. (Suraj) v3: -Add separate file for 6.4 fixed point helper(Jani, Nikula) -Add comment for magic values(Suraj) v4: -Fix checkpatch warnings caused by renaming(Suraj) v5: -Rebase. -Use existing helpers for conversion of bpp_int to bpp_x16 and vice versa. Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com> Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com> Reviewed-by: Sui Jingfeng <suijingfeng@loongson.cn> Link: https://patchwork.freedesktop.org/patch/msgid/20231110101020.4067342-3-ankit.k.nautiyal@intel.com
2023-09-20drm/i915/dsi: let HW maintain CLK_POSTWilliam Tseng
This change is to adjust TCLK-POST timing so DSI signaling can meet CTS specification. For clock lane, the TCLK-POST timing may be changed from 133.44 ns to 178.72 ns, which is greater than (60 ns+52*UI) and is conformed to the CTS standard. The computed UI is around 1.47 ns. v2: remove the change of HS-TRAIL. Cc: Ville Syrjala <ville.syrjala@linux.intel.com> Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Vandita Kulkarni <vandita.kulkarni@intel.com> Cc: Suraj Kandpal <suraj.kandpal@intel.com> Cc: Lee Shawn C <shawn.c.lee@intel.com> Signed-off-by: William Tseng <william.tseng@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230914095137.4132029-1-william.tseng@intel.com
2023-08-07drm/i915/jsl: s/JSL/JASPERLAKE for platform/subplatform definesDnyaneshwar Bhadane
Follow consistent naming convention. Replace JSL with JASPERLAKE. Unroll IS_JSL_EHL() define with IS_JASPERLAKE() || IS_ELKHARTLAKE() condition. Change in the display step define for Jasperlake. v2: - Change subject prefix skl instead of SKL(Anusha) v3: - Remove the use of define IS_JSL_EHL. - Replace with IS_JASPERLAKE() || IS_ELKHARTLAKE() - Unrolled wrapper IS_JSL_ELK_DISPLAY_STEP (Jani/Tvrtko) v4: - Removed unused macro v5: - Resolved valid checkpatch warning(Jani) Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Anusha Srivatsa <anusha.srivatsa@intel.com> Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com> Acked-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230801135344.3797924-9-dnyaneshwar.bhadane@intel.com
2023-07-06drm/i915: Try to initialize DDI/ICL+ DSI ports for every VBT child deviceVille Syrjälä
Try to deal with duplicate child devices for the same DDI port by attempting to initialize them in VBT defined order The first on to succeed for a specific DDI port will be the one we use. We'll also get rid of i915->display.vbt.ports[] here as any conflicts will now be handled at encoder registration time rather than during VBT parsing. Note that intel_bios_encoder_data_lookup() still remaims for pre-DDI DP/HDMI ports as those don't (at least yet) use VBT driven initialization. TODO: DSI dual link handling is sketchy at best v2: Leave intel_bios_encoder_port() to the encoder callback (Jani) Cc: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230630155846.29931-7-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2023-06-13drm/i915/dsi: Remove weird has_pch_encoder assertsVille Syrjälä
No idea why the DSI code is feeling the need to assert that has_pch_encoder must not be set. PCH encoders aren't even a thing on any platform that has DSI. Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230608203057.23759-14-ville.syrjala@linux.intel.com
2023-06-13drm/i915/dsi: Grab the crtc from the customary placeVille Syrjälä
The encoder hooks already get passed the crtc state so just grab the crtc from there instead of from the connector state. This is generally what everyone else does, so no reason for icl_dsi.c to be different. Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230608203057.23759-13-ville.syrjala@linux.intel.com
2023-06-13drm/i915/dsi: Move panel reset+power off to be the last thingVille Syrjälä
Follow what Windows does and do the DSI panel reset+power off after everything else. v2: s/intel_dsi_msleep/msleep/ Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230608203057.23759-12-ville.syrjala@linux.intel.com
2023-06-13drm/i915/dsi: Respect power_off_delay on icl+Ville Syrjälä
icl+ DSI isn't respecting the panel power_off_delay. Remedy that. Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230608203057.23759-11-ville.syrjala@linux.intel.com
generated by cgit v1.2.3 (git 2.39.1) at 2025-08-02 05:52:23 +0000