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2025-07-05ARM: dts: microchip: sama7d65: Add cache configuration for cpu nodeMihai Sain
Describe the cache memories according with datasheet chapter 15.2: - L1 cache configuration with 32KB for both data and instruction cache. - L2 cache configuration with 256KB unified cache. Before this patch the kernel reported the warning: [ 0.161955] cacheinfo: Unable to detect cache hierarchy for CPU 0 Signed-off-by: Mihai Sain <mihai.sain@microchip.com> Link: https://lore.kernel.org/r/20250619070636.8844-2-mihai.sain@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2025-06-22ARM: dts: microchip: sama7d65: Add clock name propertyRyan Wanner
Add clock-output-names to the xtal nodes, so the driver can correctly register the main and slow xtal. This fixes the issue of the SoC clock driver not being able to find the main xtal and slow xtal correctly causing a bad clock tree. Fixes: 261dcfad1b59 ("ARM: dts: microchip: add sama7d65 SoC DT") Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com> Link: https://lore.kernel.org/r/3878ae6d0016d46f0c91bd379146d575d5d336aa.1750175453.git.Ryan.Wanner@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2025-06-22ARM: dts: microchip: sama7d65: Add CAN bus supportRyan Wanner
Add support for CAN bus to the SAMA7D65 SoC. Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@tuxon.dev> Link: https://lore.kernel.org/r/f80a4206c05ed5d80a9527476963a18070ca42b6.1749666053.git.Ryan.Wanner@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2025-06-22ARM: dts: microchip: sama7d65: Add PWM supportRyan Wanner
Add support for PWMs to the SAMA7D65 SoC. Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@tuxon.dev> Link: https://lore.kernel.org/r/195c69a19be1ff14736db402e0f1ee64438b4b20.1749666053.git.Ryan.Wanner@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2025-06-22ARM: dts: microchip: sama7d65: Add crypto supportRyan Wanner
Add and enable SHA, AES, TDES, and TRNG for SAMA7D65 SoC. Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@tuxon.dev> Link: https://lore.kernel.org/r/fc791949c97f368f32a710e64d8db4018e45e70f.1749666053.git.Ryan.Wanner@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2025-05-16ARM: dts: microchip: sama7d65: Add RTT and GPBR Support for sama7d65 SoCRyan Wanner
Add RTT support for SAMA7D65 SoC. The GPBR is added so the SoC is able to store the RTT time data. Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com> Link: https://lore.kernel.org/r/e8868ef06102241b47883ba10edaed751831be6d.1744666011.git.Ryan.Wanner@microchip.com [claudiu.beznea: keep nodes sorted by their address] Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2025-05-16ARM: dts: microchip: sama7d65: Add SRAM and DRAM components supportRyan Wanner
Add SRAM, secumod, UDDRC, and DDR3phy to enable support for low power modes. Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com> Link: https://lore.kernel.org/r/354ecd628fdd292d2125570a6b10a93cbecb7706.1744666011.git.Ryan.Wanner@microchip.com [claudiu.beznea: keep nodes sorted by their address] Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2025-05-16ARM: dts: microchip: sama7d65: Add FLEXCOMs to sama7d65 SoCRyan Wanner
Add FLEXCOMs to the SAMA7D65 SoC device tree. Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com> Link: https://lore.kernel.org/r/d474fcd850978261ac889950ac1c3a36bc6d3926.1743523114.git.Ryan.Wanner@microchip.com [claudiu.beznea: use vendor specific properties at the end of the node, align DMA entries, add missing spaces] Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2025-05-16ARM: dts: microchip: sama7d65: Add gmac interfaces for sama7d65 SoCRyan Wanner
Add support for GMAC interfaces on SAMA7D65 SoC. Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com> Link: https://lore.kernel.org/r/05b107796b6f3a173d0dd0a5b2107b675cfd994e.1743523114.git.Ryan.Wanner@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2025-03-03ARM: dts: microchip: sama7d65: Add watchdog for sama7d65Ryan Wanner
Add watchdog timer support for SAMA7D65 SoC. Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com> Link: https://lore.kernel.org/r/05785a34b9181b7debb57c1896cc733bd3088c56.1740675317.git.Ryan.Wanner@microchip.com [claudiu.beznea: fixed conflict] Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2025-03-02ARM: dts: microchip: sama7d65: Add SFRBU support to sama7d65Ryan Wanner
Add SFRBU support to the SAMA7D65 SoC. This is required to change the power source for backup mode for the SoC. Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com> Link: https://lore.kernel.org/r/dbc51f95f301c106c031fb93f84d0d847e818d91.1740671156.git.Ryan.Wanner@microchip.com [claudiu.beznea: fixed conflict] Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2025-03-02ARM: dts: microchip: sama7d65: Add RTC support for sama7d65Ryan Wanner
Add RTC support for the SAMA7D65 SoC. Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com> Link: https://lore.kernel.org/r/fa1587ffef21a8198317062c15d8eb5c3ca6187c.1740671156.git.Ryan.Wanner@microchip.com [claudiu.beznea: fixed conflict, keep nodes sorted by their addresses] Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2025-03-02ARM: dts: microchip: sama7d65: Add Shutdown controller supportRyan Wanner
Add shutdown controller support for SAMA7D65 SoC. Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com> Link: https://lore.kernel.org/r/ffc76b757cd1ba4ca38947f8b30525b848aa8ad7.1740671156.git.Ryan.Wanner@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2025-03-02ARM: dts: microchip: sama7d65: Add Reset Controller to sama7d65 SoCRyan Wanner
Add Reset Controller support to SAMA7D65 SoC. Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com> Link: https://lore.kernel.org/r/a9620ff11456a1ddfb9c289421606602193ce5b6.1740671156.git.Ryan.Wanner@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2025-02-24ARM: dts: microchip: sama7d65: Add DMAs to sama7d65 SoCRyan Wanner
Add DMAs to the SAMA7D65 SoC device tree. Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com> Link: https://lore.kernel.org/r/78da4125a991c6f4081fce78825f1f983091e0f5.1739555984.git.Ryan.Wanner@microchip.com [claudiu.beznea: dropped extra space in reg property of dma0] Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2025-02-24ARM: dts: microchip: sama7d65: Add chipID for sama7d65Ryan Wanner
Add chipID for the sama7d65 SoC to the device tree. Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com> Link: https://lore.kernel.org/r/14e6cafb64df345e6bd79ac96961248cc266770c.1739555984.git.Ryan.Wanner@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2025-02-17ARM: dts: microchip: sama7d65: Add flexcom 10 nodeMihai Sain
Add flexcom 10 node and its i2c-controller subnode for usage on the SAMA7D65 Curiosity board. Signed-off-by: Mihai Sain <mihai.sain@microchip.com> Link: https://lore.kernel.org/r/20250211143302.4102-2-mihai.sain@microchip.com [claudiu.beznea: use compatible, reg, ranges order in flexcom node] Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2025-01-07ARM: dts: microchip: add sama7d65 SoC DTRyan Wanner
Add Device Tree for sama7d65 SoC. Co-developed-by: Dharma Balasubiramani <dharma.b@microchip.com> Signed-off-by: Dharma Balasubiramani <dharma.b@microchip.com> Co-developed-by: Romain Sioen <romain.sioen@microchip.com> Signed-off-by: Romain Sioen <romain.sioen@microchip.com> Co-developed-by: Varshini Rajendran <varshini.rajendran@microchip.com> Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com> Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@tuxon.dev> Link: https://lore.kernel.org/r/20250107160850.120537-5-Ryan.Wanner@microchip.com [claudiu.beznea: dropped comma typo from copyright, dropped space in front of slow_xtal node, dropped empty space after slow_xtal node] Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
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