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-rw-r--r--drivers/clk/renesas/rzg2l-cpg.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/clk/renesas/rzg2l-cpg.c b/drivers/clk/renesas/rzg2l-cpg.c
index c87ad5a972b7..767da288b0f7 100644
--- a/drivers/clk/renesas/rzg2l-cpg.c
+++ b/drivers/clk/renesas/rzg2l-cpg.c
@@ -1185,19 +1185,19 @@ fail:
* struct mstp_clock - MSTP gating clock
*
* @hw: handle between common and hardware-specific interfaces
+ * @priv: CPG/MSTP private data
+ * @sibling: pointer to the other coupled clock
* @off: register offset
* @bit: ON/MON bit
* @enabled: soft state of the clock, if it is coupled with another clock
- * @priv: CPG/MSTP private data
- * @sibling: pointer to the other coupled clock
*/
struct mstp_clock {
struct clk_hw hw;
+ struct rzg2l_cpg_priv *priv;
+ struct mstp_clock *sibling;
u16 off;
u8 bit;
bool enabled;
- struct rzg2l_cpg_priv *priv;
- struct mstp_clock *sibling;
};
#define to_mod_clock(_hw) container_of(_hw, struct mstp_clock, hw)