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| author | Matt Roper <matthew.d.roper@intel.com> | 2021-07-21 15:30:38 -0700 |
|---|---|---|
| committer | Matt Roper <matthew.d.roper@intel.com> | 2021-07-22 09:30:15 -0700 |
| commit | 48f8f016d4d6fbbc3bdc2c79bd8bba427072b59a (patch) | |
| tree | 10abecea2ccc582b4c0f6b071235e4de5c34168b /tools/perf/scripts/python/mem-phys-addr.py | |
| parent | 87fc875a2b85043f9cc34f84e1beb2ec51a9e5d3 (diff) | |
drm/i915/dg2: Don't wait for AUX power well enable ACKs
On DG2 we're supposed to just wait 600us after programming the well
before moving on; there won't be an ack from the hardware.
Bspec: 49296
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210721223043.834562-14-matthew.d.roper@intel.com
Diffstat (limited to 'tools/perf/scripts/python/mem-phys-addr.py')
0 files changed, 0 insertions, 0 deletions