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| author | Arun R Murthy <arun.r.murthy@intel.com> | 2024-09-25 09:14:32 +0530 |
|---|---|---|
| committer | Suraj Kandpal <suraj.kandpal@intel.com> | 2024-11-18 13:32:46 +0530 |
| commit | e725091865407fcd8d96ab9ad618c07fb6e3cc2b (patch) | |
| tree | 473175f74e82bceb17b558ba0f8dc2f1a56caebf /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | eb0c1757a36cabb730cde4e045eb52587602504d (diff) | |
drm/i915/dp: Include the time taken by AUX Tx for timeout
As per DP spec the timeout for LANE_CHANNEL_EQ_DONE is 400ms. But this
timeout value is exclusively for the Aux RD Interval and excludes the
time consumed for the AUX Tx (i.e reading/writing FFE presets). Add
another 50ms for these AUX Tx to the 400ms timeout.
Ref: "Figure 3-52: 128b132b DP DPTC LANEx_CHANNEL_EQ_DONE Sequence" of
DP2.1a spec.
Co-developed-by: Srikanth V NagaVenkata <nagavenkata.srikanth.v@intel.com>
Signed-off-by: Arun R Murthy <arun.r.murthy@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Acked-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240925034432.1777029-4-arun.r.murthy@intel.com
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions