diff options
| author | Judith Mendez <jm@ti.com> | 2025-08-20 14:30:47 -0500 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2025-08-28 16:31:08 +0200 |
| commit | baa11a683d110cd730fc206d2834decab35fb55c (patch) | |
| tree | 3030d6d88861964f4fcffa96b38681d331133790 /drivers/cdx/controller/cdx_rpmsg.c | |
| parent | 3c778a98bee16b4c7ba364a0101ee3c399a95b85 (diff) | |
mmc: sdhci_am654: Disable HS400 for AM62P SR1.0 and SR1.1
commit d2d7a96b29ea6ab093973a1a37d26126db70c79f upstream.
This adds SDHCI_AM654_QUIRK_DISABLE_HS400 quirk which shall be used
to disable HS400 support. AM62P SR1.0 and SR1.1 do not support HS400
due to errata i2458 [0] so disable HS400 for these SoC revisions.
[0] https://www.ti.com/lit/er/sprz574a/sprz574a.pdf
Fixes: 37f28165518f ("arm64: dts: ti: k3-am62p: Add ITAP/OTAP values for MMC")
Cc: stable@vger.kernel.org
Signed-off-by: Judith Mendez <jm@ti.com>
Reviewed-by: Andrew Davis <afd@ti.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/20250820193047.4064142-1-jm@ti.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
[ adapted quirk bit assignment from BIT(2) to BIT(1) ]
Signed-off-by: Sasha Levin <sashal@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/cdx/controller/cdx_rpmsg.c')
0 files changed, 0 insertions, 0 deletions