diff options
| author | Chukun Pan <amadeus@jmu.edu.cn> | 2025-03-08 18:00:01 +0800 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2025-03-13 23:07:46 +0100 |
| commit | 8fbb9376f0c489dfdc7e20d16e90686b29dec8f2 (patch) | |
| tree | e9063105d8f5cae51593ce8d66879bfc0f898a36 | |
| parent | d6166ea4cc4943cbabdeeedb13f3545fdba3ebf6 (diff) | |
arm64: dts: rockchip: Move rk356x scmi SHMEM to reserved memory
0x0 to 0xf0000000 are SDRAM memory areas where 0x10f000 is located.
So move the SHMEM memory of arm_scmi to the reserved memory node.
Fixes: a3adc0b9071d ("arm64: dts: rockchip: add core dtsi for RK3568 SoC")
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Link: https://lore.kernel.org/r/20250308100001.572657-2-amadeus@jmu.edu.cn
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
| -rw-r--r-- | arch/arm64/boot/dts/rockchip/rk356x-base.dtsi | 25 |
1 files changed, 12 insertions, 13 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi b/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi index de5e6c0c3d24..81e635620301 100644 --- a/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi @@ -174,6 +174,18 @@ method = "smc"; }; + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + scmi_shmem: shmem@10f000 { + compatible = "arm,scmi-shmem"; + reg = <0x0 0x0010f000 0x0 0x100>; + no-map; + }; + }; + timer { compatible = "arm,armv8-timer"; interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>, @@ -199,19 +211,6 @@ #clock-cells = <0>; }; - sram@10f000 { - compatible = "mmio-sram"; - reg = <0x0 0x0010f000 0x0 0x100>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x0 0x0010f000 0x100>; - - scmi_shmem: sram@0 { - compatible = "arm,scmi-shmem"; - reg = <0x0 0x100>; - }; - }; - sata1: sata@fc400000 { compatible = "rockchip,rk3568-dwc-ahci", "snps,dwc-ahci"; reg = <0 0xfc400000 0 0x1000>; |