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authorIngo Molnar <mingo@elte.hu>2009-06-07 11:34:59 +0200
committerIngo Molnar <mingo@elte.hu>2009-06-07 11:35:05 +0200
commit56fdd18c7b89a2fac1dfe5d54750c9143867fdc4 (patch)
treece48eee7d5960936fa6e385320b7a261a8bee071 /arch/mips/mm/c-r4k.c
parent7caf6a49bb17d0377210693af5737563b31aa5ee (diff)
parentb87297fb405ef13cac375f202d114323b076a56d (diff)
Merge branch 'linus' into core/iommu
Merge reason: This branch was on an -rc5 base so pull almost-2.6.30 to resync with the latest upstream fixes and make sure the combination works fine. Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/mips/mm/c-r4k.c')
-rw-r--r--arch/mips/mm/c-r4k.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index 58d9075e86f..171951d2305 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -1041,7 +1041,7 @@ static void __cpuinit probe_pcache(void)
printk("Primary instruction cache %ldkB, %s, %s, linesize %d bytes.\n",
icache_size >> 10,
- cpu_has_vtag_icache ? "VIVT" : "VIPT",
+ c->icache.flags & MIPS_CACHE_VTAG ? "VIVT" : "VIPT",
way_string[c->icache.ways], c->icache.linesz);
printk("Primary data cache %ldkB, %s, %s, %s, linesize %d bytes\n",