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authorBen Dooks <ben-linux@fluff.org>2009-05-17 22:32:23 +0100
committerBen Dooks <ben-linux@fluff.org>2009-05-18 16:26:03 +0100
commit070276d5d049f385763dee19112bea08f56c9a0d (patch)
tree5a32a885de72f18476ff067a25d8a159ac01629d /arch/arm/plat-s3c24xx/gpiolib.c
parent75cbcff3729fe2568dff38d16d6494f8fb7f59fe (diff)
[ARM] S3C24XX: GPIO: Change to macros for GPIO numbering
Prepare to remove the large number of S3C2410_GPxn defines by moving to S3C2410_GPx(n) in arch/arm. The following perl was used to change the files: perl -pi~ -e 's/S3C2410_GP([A-Z])([0-9]+)([^_^0-9])/S3C2410_GP\1\(\2\)\3/g' Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm/plat-s3c24xx/gpiolib.c')
-rw-r--r--arch/arm/plat-s3c24xx/gpiolib.c14
1 files changed, 7 insertions, 7 deletions
diff --git a/arch/arm/plat-s3c24xx/gpiolib.c b/arch/arm/plat-s3c24xx/gpiolib.c
index 60a9f724720..a82adc3c98a 100644
--- a/arch/arm/plat-s3c24xx/gpiolib.c
+++ b/arch/arm/plat-s3c24xx/gpiolib.c
@@ -82,7 +82,7 @@ struct s3c_gpio_chip s3c24xx_gpios[] = {
.base = S3C2410_GPACON,
.pm = __gpio_pm(&s3c_gpio_pm_1bit),
.chip = {
- .base = S3C2410_GPA0,
+ .base = S3C2410_GPA(0),
.owner = THIS_MODULE,
.label = "GPIOA",
.ngpio = 24,
@@ -94,7 +94,7 @@ struct s3c_gpio_chip s3c24xx_gpios[] = {
.base = S3C2410_GPBCON,
.pm = __gpio_pm(&s3c_gpio_pm_2bit),
.chip = {
- .base = S3C2410_GPB0,
+ .base = S3C2410_GPB(0),
.owner = THIS_MODULE,
.label = "GPIOB",
.ngpio = 16,
@@ -104,7 +104,7 @@ struct s3c_gpio_chip s3c24xx_gpios[] = {
.base = S3C2410_GPCCON,
.pm = __gpio_pm(&s3c_gpio_pm_2bit),
.chip = {
- .base = S3C2410_GPC0,
+ .base = S3C2410_GPC(0),
.owner = THIS_MODULE,
.label = "GPIOC",
.ngpio = 16,
@@ -114,7 +114,7 @@ struct s3c_gpio_chip s3c24xx_gpios[] = {
.base = S3C2410_GPDCON,
.pm = __gpio_pm(&s3c_gpio_pm_2bit),
.chip = {
- .base = S3C2410_GPD0,
+ .base = S3C2410_GPD(0),
.owner = THIS_MODULE,
.label = "GPIOD",
.ngpio = 16,
@@ -124,7 +124,7 @@ struct s3c_gpio_chip s3c24xx_gpios[] = {
.base = S3C2410_GPECON,
.pm = __gpio_pm(&s3c_gpio_pm_2bit),
.chip = {
- .base = S3C2410_GPE0,
+ .base = S3C2410_GPE(0),
.label = "GPIOE",
.owner = THIS_MODULE,
.ngpio = 16,
@@ -134,7 +134,7 @@ struct s3c_gpio_chip s3c24xx_gpios[] = {
.base = S3C2410_GPFCON,
.pm = __gpio_pm(&s3c_gpio_pm_2bit),
.chip = {
- .base = S3C2410_GPF0,
+ .base = S3C2410_GPF(0),
.owner = THIS_MODULE,
.label = "GPIOF",
.ngpio = 8,
@@ -145,7 +145,7 @@ struct s3c_gpio_chip s3c24xx_gpios[] = {
.base = S3C2410_GPGCON,
.pm = __gpio_pm(&s3c_gpio_pm_2bit),
.chip = {
- .base = S3C2410_GPG0,
+ .base = S3C2410_GPG(0),
.owner = THIS_MODULE,
.label = "GPIOG",
.ngpio = 10,