2 files changed, 18 insertions, 2 deletions
diff --git a/hardware.h b/hardware.h
index 15634dc..acd797d 100644
--- a/hardware.h
+++ b/hardware.h
@@ -107,8 +107,10 @@ PxIES_INIT                    //Interrupt Edge Select (0=pos 1=neg)
 
 // PORT3
 #define P3OUT_INIT      0
-#define P3DIR_INIT      (SYS_PWR_OK | VRMPWRGD)
-#define P3SEL_INIT      (MSP_BSL_TXD | MSP_BSL_RXD)
+// #define P3DIR_INIT      (SYS_PWR_OK | VRMPWRGD)
+// #define P3SEL_INIT      (MSP_BSL_TXD | MSP_BSL_RXD)
+#define P3DIR_INIT      (SYS_PWR_OK | VRMPWRGD | MSP_BSL_TXD)
+#define P3SEL_INIT      0
 
 // PORT4
 #define P4OUT_INIT      0
diff --git a/main.c b/main.c
index e0bc0e1..0cb9541 100644
--- a/main.c
+++ b/main.c
@@ -249,6 +249,9 @@ static void dump_trace(void)
 #endif /* TRACE_SERIAL */
 
 
+volatile u16 Timer_A_count;
+
+
 int main(void)
 {
   u16 state, resetState;
@@ -311,6 +314,11 @@ int main(void)
     }
 #endif /* TRACE_SERIAL */
 
+    if (Timer_A_count & 128)
+      ClrBit(P2OUT, GREEN_LED_N);
+    else
+      SetBit(P2OUT, GREEN_LED_N);
+
     ////////////////////////////////////////////////////////////////////
     switch (state) {
     case WAIT_START:
@@ -454,6 +462,12 @@ __interrupt void Timer_A(void)
   WDTCTL = WDTPW | WDTCNTCL | WDTSSEL | WDTIS1 | WDTIS0;
 #endif /* WATCHDOG */
 
+  Timer_A_count++;
+  if (Timer_A_count & 256)
+    ClrBit(P2OUT, RED_LED_N);
+  else
+    SetBit(P2OUT, RED_LED_N);
+
   if (!(P1IN & START_SW1_N))
     SW1State++;
   else