diff options
author | Guillaume Knispel <gknispel@avencall.com> | 2012-10-25 19:27:14 +0200 |
---|---|---|
committer | Guillaume Knispel <gknispel@avencall.com> | 2012-10-25 19:27:14 +0200 |
commit | 0583b6702c1b83a1bc8eb03082330090ffbaa10d (patch) | |
tree | 30f105e44d5627da1b336f5f2a090962e6234037 | |
parent | b9afdb6dadb8462d6f632c09cbe617c5c10634db (diff) |
output 500Hz square signal on two pins for debugging purposessquare_test
-rw-r--r-- | hardware.h | 8 | ||||
-rw-r--r--[-rwxr-xr-x] | main.c | 15 |
2 files changed, 18 insertions, 5 deletions
@@ -99,7 +99,7 @@ PxIES_INIT //Interrupt Edge Select (0=pos 1=neg) #define P2OUT_INIT (CK410_PWR_GD_N | CPU_VCCP_EN_N | GREEN_LED_N \ | RED_LED_N | SYS_RESET_N) #define P2DIR_INIT (CPU_VCCP_EN_N | GREEN_LED_N | RED_LED_N \ - | IMCH_RSMRST_N) + | IMCH_RSMRST_N | GP24) #define P2REN_INIT (CK410_PWR_GD_N | SYS_RESET_N) #define P2SEL_INIT 0 #define P2IE_INIT 0 @@ -107,8 +107,10 @@ PxIES_INIT //Interrupt Edge Select (0=pos 1=neg) // PORT3 #define P3OUT_INIT 0 -#define P3DIR_INIT (SYS_PWR_OK | VRMPWRGD) -#define P3SEL_INIT (MSP_BSL_TXD | MSP_BSL_RXD) +// #define P3DIR_INIT (SYS_PWR_OK | VRMPWRGD) +// #define P3SEL_INIT (MSP_BSL_TXD | MSP_BSL_RXD) +#define P3DIR_INIT (SYS_PWR_OK | VRMPWRGD | MSP_BSL_TXD) +#define P3SEL_INIT 0 // PORT4 #define P4OUT_INIT (SLP_S3_N) @@ -38,7 +38,7 @@ * MSP430 serial port * WARNING: This might disable some functions too, check the code * to see exactly what that does in this particular version */ -//#define TRACE_SERIAL +// #define TRACE_SERIAL #undef TRACE_SERIAL /* define LOOP_REBOOT if you want that the board reboot forever @@ -240,6 +240,9 @@ static void dump_trace(void) #endif /* TRACE_SERIAL */ +volatile u16 Timer_A_count; + + int main(void) { u16 state, resetState; @@ -262,6 +265,8 @@ int main(void) resetState = ON_STATE; while (1) { + P2OUT = (P2OUT & ~GP24) | ((Timer_A_count & 1) ? GP24 : 0); + //////////////////////////////////////////////////////////////////// #ifdef TRACE_SERIAL // debug behavior switch (resetState) { @@ -271,9 +276,9 @@ int main(void) resetState = RST_WAIT; } break; + resetState = ON_STATE; case RST_WAIT: if (SW2State == 0) - resetState = ON_STATE; break; } #else // normal behavior @@ -443,8 +448,14 @@ __interrupt void Timer_A(void) #ifdef WATCHDOG /* ACLK (VLO) /64 => T belongs to [0.016; 0.0032] s */ WDTCTL = WDTPW | WDTCNTCL | WDTSSEL | WDTIS1 | WDTIS0; + + P3OUT = P3IN ^ MSP_BSL_TXD; +/* if (IFG2_bit.UCA0TXIFG) + UCA0TXBUF = 'a'; */ #endif /* WATCHDOG */ + Timer_A_count++; + if (!(P1IN & START_SW1_N)) SW1State++; else |