diff options
author | Noe Rubinstein <nrubinstein@avencall.com> | 2012-01-04 18:32:41 +0100 |
---|---|---|
committer | Noe Rubinstein <nrubinstein@avencall.com> | 2012-01-04 18:32:41 +0100 |
commit | 55fe7cb7b90d06aad7481f402011582b4130f973 (patch) | |
tree | 568efa336949b01c00d72961744c020bf6db9e94 | |
parent | f22fab8086ef0375585e6f4f3a8af35f0f4c4c37 (diff) |
Formatting changes, again
-rw-r--r-- | e1000_hw.c | 247 | ||||
-rw-r--r-- | e1000_hw.h | 16 | ||||
-rw-r--r-- | e1000_main.c | 555 | ||||
-rw-r--r-- | e1000_oem_phy.c | 3580 |
4 files changed, 2191 insertions, 2207 deletions
@@ -752,8 +752,8 @@ s32 e1000_setup_link(struct e1000_hw *hw) DEBUGFUNC("e1000_setup_link"); - /* for icp_xxxx style controllers, the init control 2 and 3 are packed into - * a single word, with the top byte being occupied by control 2 + /* for icp_xxxx style controllers, the init control 2 and 3 are packed + * into a single word, with the top byte being occupied by control 2 */ eeprom_control2_reg_offset = hw->mac_type != e1000_icp_xxxx @@ -1827,7 +1827,8 @@ s32 e1000_phy_force_speed_duplex(struct e1000_hw *hw) msleep(100); } if ((i == 0) && (hw->phy_type == e1000_phy_m88)) { - /* We didn't get link. Reset the DSP and wait again for link. */ + /* We didn't get link. Reset the DSP and wait again + * for link. */ ret_val = e1000_phy_reset_dsp(hw); if (ret_val) { DEBUGOUT("Error Resetting PHY DSP\n"); @@ -1872,8 +1873,9 @@ s32 e1000_phy_force_speed_duplex(struct e1000_hw *hw) if (ret_val) return ret_val; - /* In addition, because of the s/w reset above, we need to enable CRS on - * TX. This must be set for both full and half duplex operation. + /* In addition, because of the s/w reset above, we need to + * enable CRS on TX. This must be set for both full and half + * duplex operation. */ ret_val = e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data); @@ -1896,11 +1898,10 @@ s32 e1000_phy_force_speed_duplex(struct e1000_hw *hw) } } - if(hw->phy_type == e1000_phy_oem && resetPhy) { - ret_val = e1000_oem_cleanup_after_phy_reset(hw); - if(ret_val){ - return ret_val; - } + if (hw->phy_type == e1000_phy_oem && resetPhy) { + ret_val = e1000_oem_cleanup_after_phy_reset(hw); + if (ret_val) + return ret_val; } return E1000_SUCCESS; @@ -1967,38 +1968,30 @@ static s32 e1000_config_mac_to_phy(struct e1000_hw *hw) ctrl |= (E1000_CTRL_FRCSPD | E1000_CTRL_FRCDPX); ctrl &= ~(E1000_CTRL_SPD_SEL | E1000_CTRL_ILOS); - if(hw->phy_type == e1000_phy_oem) - { - ret_val = e1000_oem_set_trans_gasket(hw); - if(ret_val){ - return ret_val; - } - ret_val = e1000_oem_phy_is_full_duplex( - hw, (int *) &is_FullDuplex); - if(ret_val){ - return ret_val; - } - ret_val = e1000_oem_phy_is_speed_1000( - hw, (int *) &is_1000MBS); - if(ret_val) { - return ret_val; - } - ret_val = e1000_oem_phy_is_speed_100( - hw, (int *) &is_100MBS); - if(ret_val) { - return ret_val; - } - } - else - { - ret_val = e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data); - if (ret_val) - { - return ret_val; - } - is_FullDuplex = phy_data & M88E1000_PSSR_DPLX; - is_1000MBS = (phy_data & M88E1000_PSSR_SPEED) == M88E1000_PSSR_1000MBS; - is_100MBS = (phy_data & M88E1000_PSSR_SPEED) == M88E1000_PSSR_100MBS; + if (hw->phy_type == e1000_phy_oem) { + ret_val = e1000_oem_set_trans_gasket(hw); + if (ret_val) + return ret_val; + ret_val = + e1000_oem_phy_is_full_duplex(hw, (int *)&is_FullDuplex); + if (ret_val) + return ret_val; + ret_val = e1000_oem_phy_is_speed_1000(hw, (int *)&is_1000MBS); + if (ret_val) + return ret_val; + ret_val = e1000_oem_phy_is_speed_100(hw, (int *)&is_100MBS); + if (ret_val) + return ret_val; + } else { + ret_val = + e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data); + if (ret_val) + return ret_val; + is_FullDuplex = phy_data & M88E1000_PSSR_DPLX; + is_1000MBS = + (phy_data & M88E1000_PSSR_SPEED) == M88E1000_PSSR_1000MBS; + is_100MBS = + (phy_data & M88E1000_PSSR_SPEED) == M88E1000_PSSR_100MBS; } /* Set up duplex in the Device Control and Transmit Control @@ -2142,10 +2135,10 @@ static s32 e1000_config_fc_after_link_up(struct e1000_hw *hw) * has completed, and if so, how the PHY and link partner has * flow control configured. */ - if((hw->media_type == e1000_media_type_copper - || (hw->media_type == e1000_media_type_oem - && e1000_oem_phy_is_copper(hw))) - && hw->autoneg) { + if ((hw->media_type == e1000_media_type_copper + || (hw->media_type == e1000_media_type_oem + && e1000_oem_phy_is_copper(hw))) + && hw->autoneg) { /* Read the MII Status Register and check to see if AutoNeg * has completed. We read this twice because this reg has * some "sticky" (latched) bits. @@ -2343,19 +2336,14 @@ static s32 e1000_check_for_serdes_link_generic(struct e1000_hw *hw) int isUp = 0; - // SDG - this is potential issue. Should not cause problems on E1000 though but may - // cause a problem for ETH1 - if (hw->mac_type == e1000_icp_xxxx) - { - ret_val = e1000_oem_phy_is_link_up(hw, &isUp); - if (ret_val) - { - return ret_val; - } - } - else - { - isUp = status & E1000_STATUS_LU; + // SDG - this is potential issue. Should not cause problems on E1000 + // though but may cause a problem for ETH1 + if (hw->mac_type == e1000_icp_xxxx) { + ret_val = e1000_oem_phy_is_link_up(hw, &isUp); + if (ret_val) + return ret_val; + } else { + isUp = status & E1000_STATUS_LU; } /* @@ -2478,17 +2466,16 @@ s32 e1000_check_for_link(struct e1000_hw *hw) if ((hw->media_type == e1000_media_type_fiber) || (hw->media_type == e1000_media_type_internal_serdes) || (hw->media_type == e1000_media_type_oem - && !e1000_oem_phy_is_copper(hw))) { + && !e1000_oem_phy_is_copper(hw))) { rxcw = er32(RXCW); if (hw->media_type == e1000_media_type_fiber) { signal = (hw->mac_type > e1000_82544) ? E1000_CTRL_SWDPIN1 : 0; - if (hw->mac_type != e1000_icp_xxxx) - { - if (status & E1000_STATUS_LU) - hw->get_link_status = false; + if (hw->mac_type != e1000_icp_xxxx) { + if (status & E1000_STATUS_LU) + hw->get_link_status = false; } } } @@ -2499,10 +2486,10 @@ s32 e1000_check_for_link(struct e1000_hw *hw) * receive a Link Status Change interrupt or we have Rx Sequence * Errors. */ - if((hw->media_type == e1000_media_type_copper - || (hw->media_type == e1000_media_type_oem - && e1000_oem_phy_is_copper(hw))) - && hw->get_link_status) { + if ((hw->media_type == e1000_media_type_copper + || (hw->media_type == e1000_media_type_oem + && e1000_oem_phy_is_copper(hw))) + && hw->get_link_status) { /* First we want to see if the MII Status Register reports * link. If so, then we want to get the current speed/duplex * of the PHY. @@ -2546,10 +2533,9 @@ s32 e1000_check_for_link(struct e1000_hw *hw) /* No link detected */ e1000_config_dsp_after_link_change(hw, false); - - if(hw->phy_type == e1000_phy_oem) { - e1000_oem_config_dsp_after_link_change(hw, FALSE); - } + if (hw->phy_type == e1000_phy_oem) + e1000_oem_config_dsp_after_link_change(hw, + FALSE); return 0; } @@ -2563,9 +2549,8 @@ s32 e1000_check_for_link(struct e1000_hw *hw) /* optimize the dsp settings for the igp phy */ e1000_config_dsp_after_link_change(hw, true); - if(hw->phy_type == e1000_phy_oem) { - e1000_oem_config_dsp_after_link_change(hw, TRUE); - } + if (hw->phy_type == e1000_phy_oem) + e1000_oem_config_dsp_after_link_change(hw, TRUE); /* We have a M88E1000 PHY and Auto-Neg is enabled. If we * have Si on board that is 82544 or newer, Auto @@ -2642,7 +2627,8 @@ s32 e1000_check_for_link(struct e1000_hw *hw) if ((hw->media_type == e1000_media_type_fiber) || (hw->media_type == e1000_media_type_internal_serdes) || - (hw->media_type == e1000_media_type_oem && !e1000_oem_phy_is_copper(hw))) // SDG - this was a dodgy port from iegbe + (hw->media_type == e1000_media_type_oem + && !e1000_oem_phy_is_copper(hw))) // SDG - this was a dodgy port from iegbe e1000_check_for_serdes_link_generic(hw); return E1000_SUCCESS; @@ -2981,10 +2967,10 @@ static s32 e1000_read_phy_reg_ex(struct e1000_hw *hw, u32 reg_addr, */ *phy_data = e1000_shift_in_mdi_bits(hw); } else { - int32_t ret_val = e1000_oem_read_phy_reg_ex(hw, reg_addr, phy_data); - if(ret_val) { - return ret_val; - } + int32_t ret_val = + e1000_oem_read_phy_reg_ex(hw, reg_addr, phy_data); + if (ret_val) + return ret_val; } return E1000_SUCCESS; @@ -3078,10 +3064,10 @@ static s32 e1000_write_phy_reg_ex(struct e1000_hw *hw, u32 reg_addr, e1000_shift_out_mdi_bits(hw, mdic, 32); } else { - int32_t ret_val = e1000_oem_write_phy_reg_ex(hw, reg_addr, phy_data); - if(ret_val){ - return ret_val; - } + int32_t ret_val = + e1000_oem_write_phy_reg_ex(hw, reg_addr, phy_data); + if (ret_val) + return ret_val; } return E1000_SUCCESS; @@ -3103,14 +3089,13 @@ s32 e1000_phy_hw_reset(struct e1000_hw *hw) DEBUGOUT("Resetting Phy...\n"); - if(hw->mac_type == e1000_icp_xxxx) - { - ret_val = e1000_oem_phy_hw_reset(hw); - if(ret_val){ + if (hw->mac_type == e1000_icp_xxxx) { + ret_val = e1000_oem_phy_hw_reset(hw); + if (ret_val) + return ret_val; + + e1000_oem_phy_init_script(hw); return ret_val; - } - e1000_oem_phy_init_script(hw); - return ret_val; } if (hw->mac_type > e1000_82543) { @@ -3152,9 +3137,8 @@ s32 e1000_phy_hw_reset(struct e1000_hw *hw) ew32(LEDCTL, led_ctrl); } - if(hw->phy_type == e1000_phy_oem){ - e1000_oem_phy_init_script(hw); - } + if (hw->phy_type == e1000_phy_oem) + e1000_oem_phy_init_script(hw); /* Wait for FW to finish PHY configuration. */ ret_val = e1000_get_phy_cfg_done(hw); @@ -3476,9 +3460,9 @@ s32 e1000_phy_get_info(struct e1000_hw *hw, struct e1000_phy_info *phy_info) phy_info->local_rx = e1000_1000t_rx_status_undefined; phy_info->remote_rx = e1000_1000t_rx_status_undefined; - if(hw->media_type != e1000_media_type_copper - && (hw->media_type == e1000_media_type_oem - && !e1000_oem_phy_is_copper(hw))) { + if (hw->media_type != e1000_media_type_copper + && (hw->media_type == e1000_media_type_oem + && !e1000_oem_phy_is_copper(hw))) { DEBUGOUT("PHY info is only valid for copper media\n"); return -E1000_ERR_CONFIG; } @@ -3956,8 +3940,8 @@ static s32 e1000_do_read_eeprom(struct e1000_hw *hw, u16 offset, u16 words, if (eeprom->word_size == 0) e1000_init_eeprom_params(hw); - /* A check for invalid values: offset too large, too many words, and not - * enough words. + /* A check for invalid values: offset too large, too many words, and + * not enough words. */ if ((offset >= eeprom->word_size) || (words > eeprom->word_size - offset) || (words == 0)) { @@ -4119,8 +4103,8 @@ static s32 e1000_do_write_eeprom(struct e1000_hw *hw, u16 offset, u16 words, if (eeprom->word_size == 0) e1000_init_eeprom_params(hw); - /* A check for invalid values: offset too large, too many words, and not - * enough words. + /* A check for invalid values: offset too large, too many words, and + * not enough words. */ if ((offset >= eeprom->word_size) || (words > eeprom->word_size - offset) || (words == 0)) { @@ -4249,14 +4233,15 @@ static s32 e1000_write_eeprom_microwire(struct e1000_hw *hw, u16 offset, /* Send the data */ e1000_shift_out_ee_bits(hw, data[words_written], 16); - /* Toggle the CS line. This in effect tells the EEPROM to execute - * the previous command. + /* Toggle the CS line. This in effect tells the EEPROM to + * execute the previous command. */ e1000_standby_eeprom(hw); - /* Read DO repeatedly until it is high (equal to '1'). The EEPROM will - * signal that the command has been completed by raising the DO signal. - * If DO does not go high in 10 milliseconds, then error out. + /* Read DO repeatedly until it is high (equal to '1'). The + * EEPROM will signal that the command has been completed by + * raising the DO signal. If DO does not go high in 10 + * milliseconds, then error out. */ for (i = 0; i < 200; i++) { eecd = er32(EECD); @@ -4300,22 +4285,24 @@ s32 e1000_read_mac_addr(struct e1000_hw *hw) { u16 offset; u16 eeprom_data, i; - uint16_t ia_base_addr=0; + uint16_t ia_base_addr = 0; DEBUGFUNC("e1000_read_mac_addr"); - if(hw->mac_type == e1000_icp_xxxx) { - struct e1000_adapter *adapter; - uint32_t device_number; + if (hw->mac_type == e1000_icp_xxxx) { + struct e1000_adapter *adapter; + uint32_t device_number; - adapter = (struct e1000_adapter *) hw->back; - device_number = PCI_SLOT(adapter->pdev->devfn); - ia_base_addr = (uint16_t) EEPROM_IA_START_ICP_xxxx(device_number); + adapter = (struct e1000_adapter *)hw->back; + device_number = PCI_SLOT(adapter->pdev->devfn); + ia_base_addr = + (uint16_t) EEPROM_IA_START_ICP_xxxx(device_number); } for (i = 0; i < NODE_ADDRESS_SIZE; i += 2) { offset = i >> 1; - if (e1000_read_eeprom(hw, offset+ia_base_addr, 1, &eeprom_data) < 0) { + if (e1000_read_eeprom + (hw, offset + ia_base_addr, 1, &eeprom_data) < 0) { DEBUGOUT("EEPROM Read Error\n"); return -E1000_ERR_EEPROM; } @@ -4835,8 +4822,8 @@ static void e1000_clear_hw_cntrs(struct e1000_hw *hw) temp = er32(TSCTC); temp = er32(TSCTFC); - if (hw->mac_type <= e1000_82544 - || hw->mac_type == e1000_icp_xxxx) { return;} + if (hw->mac_type <= e1000_82544 || hw->mac_type == e1000_icp_xxxx) + return; temp = er32(MGTPRC); temp = er32(MGTPDC); @@ -5175,13 +5162,11 @@ static s32 e1000_get_cable_length(struct e1000_hw *hw, u16 *min_length, IGP01E1000_AGC_RANGE) : 0; *max_length = e1000_igp_cable_length_table[agc_value] + IGP01E1000_AGC_RANGE; - } else if(hw->phy_type == e1000_phy_oem) { - ret_val = e1000_oem_get_cable_length(hw, - min_length, - max_length); - if(ret_val){ - return ret_val; - } + } else if (hw->phy_type == e1000_phy_oem) { + ret_val = e1000_oem_get_cable_length(hw, + min_length, max_length); + if (ret_val) + return ret_val; } return E1000_SUCCESS; @@ -5252,7 +5237,7 @@ static s32 e1000_check_polarity(struct e1000_hw *hw, e1000_rev_polarity_normal; } } else if (hw->phy_type == e1000_phy_oem) { - return e1000_oem_check_polarity(hw, (uint16_t*)polarity); + return e1000_oem_check_polarity(hw, (uint16_t *) polarity); } return E1000_SUCCESS; @@ -5298,9 +5283,9 @@ static s32 e1000_check_downshift(struct e1000_hw *hw) } else if (hw->phy_type == e1000_phy_oem) { ret_val = e1000_oem_phy_speed_downgraded(hw, &phy_data); - if(ret_val) - return ret_val; - hw->speed_downgraded = phy_data>0; + if (ret_val) + return ret_val; + hw->speed_downgraded = phy_data > 0; } @@ -5614,10 +5599,10 @@ s32 e1000_set_d3_lplu_state(struct e1000_hw *hw, bool active) return ret_val; } - /* LPLU and SmartSpeed are mutually exclusive. LPLU is used during - * Dx states where the power conservation is most important. During - * driver activity we should enable SmartSpeed, so performance is - * maintained. */ + /* LPLU and SmartSpeed are mutually exclusive. LPLU is used + * during Dx states where the power conservation is most + * important. During driver activity we should enable + * SmartSpeed, so performance is maintained. */ if (hw->smart_speed == e1000_smart_speed_on) { ret_val = e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_CONFIG, @@ -50,7 +50,7 @@ typedef enum { e1000_82540, e1000_82545, e1000_82545_rev_3, - e1000_icp_xxxx, + e1000_icp_xxxx, e1000_82546, e1000_82546_rev_3, e1000_82541, @@ -104,8 +104,8 @@ typedef enum { e1000_bus_type_unknown = 0, e1000_bus_type_pci, e1000_bus_type_pcix, - e1000_bus_type_pci_express, - e1000_bus_type_cpp, + e1000_bus_type_pci_express, + e1000_bus_type_cpp, e1000_bus_type_reserved } e1000_bus_type; @@ -212,10 +212,10 @@ typedef enum { } e1000_1000t_rx_status; typedef enum { - e1000_phy_m88 = 0, - e1000_phy_igp, - e1000_phy_oem, - e1000_phy_undefined = 0xFF + e1000_phy_m88 = 0, + e1000_phy_igp, + e1000_phy_oem, + e1000_phy_undefined = 0xFF } e1000_phy_type; typedef enum { @@ -1406,7 +1406,7 @@ struct e1000_hw { bool leave_av_bit_off; bool bad_tx_carr_stats_fd; bool has_smbus; - bool icp_xxxx_is_link_up; + bool icp_xxxx_is_link_up; }; #define E1000_EEPROM_SWDPIN0 0x0001 /* SWDPIN 0 EEPROM Value */ diff --git a/e1000_main.c b/e1000_main.c index f99acfb..d75dd72 100644 --- a/e1000_main.c +++ b/e1000_main.c @@ -86,18 +86,18 @@ static DEFINE_PCI_DEVICE_TABLE(e1000_pci_tbl) = { INTEL_E1000_ETHERNET_DEVICE(0x108A), INTEL_E1000_ETHERNET_DEVICE(0x1099), INTEL_E1000_ETHERNET_DEVICE(0x10B5), - INTEL_E1000_ETHERNET_DEVICE(0x5040), - INTEL_E1000_ETHERNET_DEVICE(0x5041), - INTEL_E1000_ETHERNET_DEVICE(0x5042), - INTEL_E1000_ETHERNET_DEVICE(0x5043), - INTEL_E1000_ETHERNET_DEVICE(0x5044), - INTEL_E1000_ETHERNET_DEVICE(0x5045), - INTEL_E1000_ETHERNET_DEVICE(0x5046), - INTEL_E1000_ETHERNET_DEVICE(0x5047), - INTEL_E1000_ETHERNET_DEVICE(0x5048), - INTEL_E1000_ETHERNET_DEVICE(0x5049), - INTEL_E1000_ETHERNET_DEVICE(0x504A), - INTEL_E1000_ETHERNET_DEVICE(0x504B), + INTEL_E1000_ETHERNET_DEVICE(0x5040), + INTEL_E1000_ETHERNET_DEVICE(0x5041), + INTEL_E1000_ETHERNET_DEVICE(0x5042), + INTEL_E1000_ETHERNET_DEVICE(0x5043), + INTEL_E1000_ETHERNET_DEVICE(0x5044), + INTEL_E1000_ETHERNET_DEVICE(0x5045), + INTEL_E1000_ETHERNET_DEVICE(0x5046), + INTEL_E1000_ETHERNET_DEVICE(0x5047), + INTEL_E1000_ETHERNET_DEVICE(0x5048), + INTEL_E1000_ETHERNET_DEVICE(0x5049), + INTEL_E1000_ETHERNET_DEVICE(0x504A), + INTEL_E1000_ETHERNET_DEVICE(0x504B), /* required last entry */ {0,} }; @@ -114,13 +114,13 @@ int e1000_setup_all_rx_resources(struct e1000_adapter *adapter); void e1000_free_all_tx_resources(struct e1000_adapter *adapter); void e1000_free_all_rx_resources(struct e1000_adapter *adapter); static int e1000_setup_tx_resources(struct e1000_adapter *adapter, - struct e1000_tx_ring *txdr); + struct e1000_tx_ring *txdr); static int e1000_setup_rx_resources(struct e1000_adapter *adapter, - struct e1000_rx_ring *rxdr); + struct e1000_rx_ring *rxdr); static void e1000_free_tx_resources(struct e1000_adapter *adapter, - struct e1000_tx_ring *tx_ring); + struct e1000_tx_ring *tx_ring); static void e1000_free_rx_resources(struct e1000_adapter *adapter, - struct e1000_rx_ring *rx_ring); + struct e1000_rx_ring *rx_ring); void e1000_update_stats(struct e1000_adapter *adapter); static int e1000_init_module(void); @@ -137,9 +137,9 @@ static void e1000_setup_rctl(struct e1000_adapter *adapter); static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter); static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter); static void e1000_clean_tx_ring(struct e1000_adapter *adapter, - struct e1000_tx_ring *tx_ring); + struct e1000_tx_ring *tx_ring); static void e1000_clean_rx_ring(struct e1000_adapter *adapter, - struct e1000_rx_ring *rx_ring); + struct e1000_rx_ring *rx_ring); static void e1000_set_rx_mode(struct net_device *netdev); static void e1000_update_phy_info(unsigned long data); static void e1000_watchdog(unsigned long data); @@ -174,7 +174,7 @@ static void e1000_tx_timeout(struct net_device *dev); static void e1000_reset_task(struct work_struct *work); static void e1000_smartspeed(struct e1000_adapter *adapter); static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter, - struct sk_buff *skb); + struct sk_buff *skb); static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp); static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid); @@ -199,7 +199,7 @@ MODULE_PARM_DESC(copybreak, "Maximum size of packet that is copied to a new buffer on receive"); static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, - pci_channel_state_t state); + pci_channel_state_t state); static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev); static void e1000_io_resume(struct pci_dev *pdev); @@ -210,9 +210,9 @@ static struct pci_error_handlers e1000_err_handler = { }; static struct pci_driver e1000_driver = { - .name = e1000_driver_name, + .name = e1000_driver_name, .id_table = e1000_pci_tbl, - .probe = e1000_probe, + .probe = e1000_probe, .remove = __devexit_p(e1000_remove), #ifdef CONFIG_PM /* Power Managment Hooks */ @@ -235,7 +235,7 @@ MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)"); #ifdef CONFIG_E1000_EP80579 static uint8_t gcu_suspend = 0x0; static uint8_t gcu_resume = 0x0; -struct pci_dev *gcu = NULL; +static struct pci_dev *gcu; #endif @@ -294,10 +294,10 @@ static int e1000_request_irq(struct e1000_adapter *adapter) int err; err = request_irq(adapter->pdev->irq, handler, irq_flags, netdev->name, - netdev); + netdev); if (err) { DPRINTK(PROBE, ERR, - "Unable to allocate interrupt Error: %d\n", err); + "Unable to allocate interrupt Error: %d\n", err); } return err; @@ -412,7 +412,7 @@ static void e1000_configure(struct e1000_adapter *adapter) for (i = 0; i < adapter->num_rx_queues; i++) { struct e1000_rx_ring *ring = &adapter->rx_ring[i]; adapter->alloc_rx_buf(adapter, ring, - E1000_DESC_UNUSED(ring)); + E1000_DESC_UNUSED(ring)); } } @@ -570,7 +570,7 @@ void e1000_reset(struct e1000_adapter *adapter) case e1000_82540: case e1000_82541: case e1000_82541_rev_2: - case e1000_icp_xxxx: + case e1000_icp_xxxx: legacy_pba_adjust = true; pba = E1000_PBA_48K; break; @@ -621,8 +621,8 @@ void e1000_reset(struct e1000_adapter *adapter) * but don't include ethernet FCS because hardware appends it */ min_tx_space = (hw->max_frame_size + - sizeof(struct e1000_tx_desc) - - ETH_FCS_LEN) * 2; + sizeof(struct e1000_tx_desc) - + ETH_FCS_LEN) * 2; min_tx_space = ALIGN(min_tx_space, 1024); min_tx_space >>= 10; /* software strips receive CRC, so leave room for it */ @@ -736,7 +736,7 @@ static void e1000_dump_eeprom(struct e1000_adapter *adapter) printk(KERN_ERR "/*********************/\n"); printk(KERN_ERR "Current EEPROM Checksum : 0x%04x\n", csum_old); - printk(KERN_ERR "Calculated : 0x%04x\n", csum_new); + printk(KERN_ERR "Calculated : 0x%04x\n", csum_new); printk(KERN_ERR "Offset Values\n"); printk(KERN_ERR "======== ======\n"); @@ -805,7 +805,7 @@ static const struct net_device_ops e1000_netdev_ops = { .ndo_get_stats = e1000_get_stats, .ndo_set_rx_mode = e1000_set_rx_mode, .ndo_set_mac_address = e1000_set_mac, - .ndo_tx_timeout = e1000_tx_timeout, + .ndo_tx_timeout = e1000_tx_timeout, .ndo_change_mtu = e1000_change_mtu, .ndo_do_ioctl = e1000_ioctl, .ndo_validate_addr = eth_validate_addr, @@ -1021,12 +1021,12 @@ static int __devinit e1000_probe(struct pci_dev *pdev, EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data); eeprom_apme_mask = E1000_EEPROM_82544_APM; break; - case e1000_icp_xxxx: - e1000_read_eeprom(&adapter->hw, - EEPROM_INIT_CONTROL3_ICP_xxxx(adapter->bd_number), - 1, &eeprom_data); - eeprom_apme_mask = EEPROM_CTRL3_APME_ICP_xxxx; - break; + case e1000_icp_xxxx: + e1000_read_eeprom(&adapter->hw, + EEPROM_INIT_CONTROL3_ICP_xxxx(adapter->bd_number), + 1, &eeprom_data); + eeprom_apme_mask = EEPROM_CTRL3_APME_ICP_xxxx; + break; case e1000_82546: case e1000_82546_rev_3: if (er32(STATUS) & E1000_STATUS_FUNC_1){ @@ -1084,40 +1084,41 @@ static int __devinit e1000_probe(struct pci_dev *pdev, printk("%pM\n", netdev->dev_addr); - /* The ICP_xxxx device has multiple, duplicate interrupt - * registers, so disable all but the first one - */ - if(adapter->hw.mac_type == e1000_icp_xxxx) { - int offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_ST) - + PCI_ST_SMIA_OFFSET; - pci_write_config_dword(adapter->pdev, offset, 0x00000006); - E1000_WRITE_REG(&adapter->hw, IMC1, ~0UL); - E1000_WRITE_REG(&adapter->hw, IMC2, ~0UL); - } + /* The ICP_xxxx device has multiple, duplicate interrupt + * registers, so disable all but the first one + */ + if (adapter->hw.mac_type == e1000_icp_xxxx) { + int offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_ST) + + PCI_ST_SMIA_OFFSET; + pci_write_config_dword(adapter->pdev, offset, 0x00000006); + E1000_WRITE_REG(&adapter->hw, IMC1, ~0UL); + E1000_WRITE_REG(&adapter->hw, IMC2, ~0UL); + } /* reset the hardware with the new settings */ e1000_reset(adapter); - if(adapter->hw.mac_type != e1000_icp_xxxx) { - strcpy(netdev->name, "eth%d"); - } - else - { - uint32_t dev_num; - dev_num = PCI_SLOT(adapter->pdev->devfn); - - switch ( dev_num ) { - case ICP_XXXX_MAC_0: - strcpy(netdev->name, CONFIG_E1000_EP80579_MAC0_BASE_NAME "%d"); - break; - case ICP_XXXX_MAC_1: - strcpy(netdev->name, CONFIG_E1000_EP80579_MAC1_BASE_NAME "%d"); - break; - case ICP_XXXX_MAC_2: - strcpy(netdev->name, CONFIG_E1000_EP80579_MAC2_BASE_NAME "%d"); - break; - } - } + if (adapter->hw.mac_type != e1000_icp_xxxx) { + strcpy(netdev->name, "eth%d"); + } else { + uint32_t dev_num; + dev_num = PCI_SLOT(adapter->pdev->devfn); + + switch (dev_num) { + case ICP_XXXX_MAC_0: + strcpy(netdev->name, + CONFIG_E1000_EP80579_MAC0_BASE_NAME "%d"); + break; + case ICP_XXXX_MAC_1: + strcpy(netdev->name, + CONFIG_E1000_EP80579_MAC1_BASE_NAME "%d"); + break; + case ICP_XXXX_MAC_2: + strcpy(netdev->name, + CONFIG_E1000_EP80579_MAC2_BASE_NAME "%d"); + break; + } + } err = register_netdev(netdev); if (err) @@ -1250,8 +1251,8 @@ static int __devinit e1000_sw_init(struct e1000_adapter *adapter) /* Copper options */ if (hw->media_type == e1000_media_type_copper - || (hw->media_type == e1000_media_type_oem - && e1000_oem_phy_is_copper(&adapter->hw))) { + || (hw->media_type == e1000_media_type_oem + && e1000_oem_phy_is_copper(&adapter->hw))) { hw->mdix = AUTO_ALL_MODES; hw->disable_polarity_correction = false; hw->master_slave = E1000_MASTER_SLAVE; @@ -1268,13 +1269,13 @@ static int __devinit e1000_sw_init(struct e1000_adapter *adapter) /* Explicitly disable IRQ since the NIC can be in any state. */ e1000_irq_disable(adapter); - /* - * for ICP_XXXX style controllers, it is necessary to keep - * track of the last known state of the link to determine if - * the link experienced a change in state when e1000_watchdog - * fires - */ - adapter->hw.icp_xxxx_is_link_up = false; + /* + * for ICP_XXXX style controllers, it is necessary to keep + * track of the last known state of the link to determine if + * the link experienced a change in state when e1000_watchdog + * fires + */ + adapter->hw.icp_xxxx_is_link_up = false; spin_lock_init(&adapter->stats_lock); @@ -1294,12 +1295,12 @@ static int __devinit e1000_sw_init(struct e1000_adapter *adapter) static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter) { adapter->tx_ring = kcalloc(adapter->num_tx_queues, - sizeof(struct e1000_tx_ring), GFP_KERNEL); + sizeof(struct e1000_tx_ring), GFP_KERNEL); if (!adapter->tx_ring) return -ENOMEM; adapter->rx_ring = kcalloc(adapter->num_rx_queues, - sizeof(struct e1000_rx_ring), GFP_KERNEL); + sizeof(struct e1000_rx_ring), GFP_KERNEL); if (!adapter->rx_ring) { kfree(adapter->tx_ring); return -ENOMEM; @@ -1522,7 +1523,7 @@ setup_tx_desc_die: /** * e1000_setup_all_tx_resources - wrapper to allocate Tx resources - * (Descriptors) for all queues + * (Descriptors) for all queues * @adapter: board private structure * * Return 0 on success, negative on failure @@ -1585,10 +1586,10 @@ static void e1000_configure_tx(struct e1000_adapter *adapter) tipg = DEFAULT_82543_TIPG_IPGT_FIBER; else if (hw->media_type != e1000_media_type_oem) tipg = DEFAULT_82543_TIPG_IPGT_COPPER; - else - tipg = (0xFFFFFFFFUL >> (sizeof(tipg)*0x8 - - E1000_TIPG_IPGR1_SHIFT)) - & e1000_oem_get_tipg(&adapter->hw); + else + tipg = (0xFFFFFFFFUL >> (sizeof(tipg)*0x8 - + E1000_TIPG_IPGR1_SHIFT)) + & e1000_oem_get_tipg(&adapter->hw); switch (hw->mac_type) { case e1000_82542_rev2_0: @@ -1725,7 +1726,7 @@ setup_rx_desc_die: /** * e1000_setup_all_rx_resources - wrapper to allocate Rx resources - * (Descriptors) for all queues + * (Descriptors) for all queues * @adapter: board private structure * * Return 0 on success, negative on failure @@ -1815,12 +1816,12 @@ static void e1000_configure_rx(struct e1000_adapter *adapter) if (adapter->netdev->mtu > ETH_DATA_LEN) { rdlen = adapter->rx_ring[0].count * - sizeof(struct e1000_rx_desc); + sizeof(struct e1000_rx_desc); adapter->clean_rx = e1000_clean_jumbo_rx_irq; adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers; } else { rdlen = adapter->rx_ring[0].count * - sizeof(struct e1000_rx_desc); + sizeof(struct e1000_rx_desc); adapter->clean_rx = e1000_clean_rx_irq; adapter->alloc_rx_buf = e1000_alloc_rx_buffers; } @@ -2036,13 +2037,13 @@ static void e1000_clean_rx_ring(struct e1000_adapter *adapter, if (buffer_info->dma && adapter->clean_rx == e1000_clean_rx_irq) { pci_unmap_single(pdev, buffer_info->dma, - buffer_info->length, - PCI_DMA_FROMDEVICE); + buffer_info->length, + PCI_DMA_FROMDEVICE); } else if (buffer_info->dma && - adapter->clean_rx == e1000_clean_jumbo_rx_irq) { + adapter->clean_rx == e1000_clean_jumbo_rx_irq) { pci_unmap_page(pdev, buffer_info->dma, - buffer_info->length, - PCI_DMA_FROMDEVICE); + buffer_info->length, + PCI_DMA_FROMDEVICE); } buffer_info->dma = 0; @@ -2330,23 +2331,22 @@ bool e1000_has_link(struct e1000_adapter *adapter) struct e1000_hw *hw = &adapter->hw; bool link_active = false; - /* - * Test the PHY for link status on icp_xxxx MACs. - * If the link status is different than the last link status stored - * in the adapter->hw structure, then set hw->get_link_status = 1 - */ - if(adapter->hw.mac_type == e1000_icp_xxxx) { - int isUp = 0x0; - int32_t ret_val; - - ret_val = e1000_oem_phy_is_link_up(&adapter->hw, &isUp); - if(ret_val != E1000_SUCCESS) { - isUp = 0x0; - } - if(isUp != adapter->hw.icp_xxxx_is_link_up) { - adapter->hw.get_link_status = 0x1; - } - } + /* + * Test the PHY for link status on icp_xxxx MACs. + * If the link status is different than the last link status stored + * in the adapter->hw structure, then set hw->get_link_status = 1 + */ + if (adapter->hw.mac_type == e1000_icp_xxxx) { + int isUp = 0; + int32_t ret_val; + + ret_val = e1000_oem_phy_is_link_up(&adapter->hw, &isUp); + if (ret_val != E1000_SUCCESS) + isUp = 0; + + if (isUp != adapter->hw.icp_xxxx_is_link_up) + adapter->hw.get_link_status = 1; + } /* get_link_status is set on LSC (link status) interrupt or * rx sequence error interrupt. get_link_status will stay @@ -2372,23 +2372,20 @@ bool e1000_has_link(struct e1000_adapter *adapter) break; case e1000_media_type_oem: e1000_check_for_link(hw); - break; + break; default: break; } + if (adapter->hw.mac_type == e1000_icp_xxxx) { + int isUp = 0x0; - if(adapter->hw.mac_type == e1000_icp_xxxx) - { - int isUp = 0x0; - - if(e1000_oem_phy_is_link_up(&adapter->hw, &isUp) != E1000_SUCCESS) - { - isUp = 0x0; - } - link_active = isUp; - } + if (e1000_oem_phy_is_link_up(&adapter->hw, &isUp) != + E1000_SUCCESS) + isUp = 0x0; + link_active = isUp; + } return link_active; } @@ -2415,8 +2412,8 @@ static void e1000_watchdog(unsigned long data) bool txb2b = true; /* update snapshot of PHY registers on LSC */ e1000_get_speed_and_duplex(hw, - &adapter->link_speed, - &adapter->link_duplex); + &adapter->link_speed, + &adapter->link_duplex); ctrl = er32(CTRL); printk(KERN_INFO "e1000: %s NIC Link is Up %d Mbps %s, " @@ -2424,11 +2421,12 @@ static void e1000_watchdog(unsigned long data) netdev->name, adapter->link_speed, adapter->link_duplex == FULL_DUPLEX ? - "Full Duplex" : "Half Duplex", - ((ctrl & E1000_CTRL_TFCE) && (ctrl & - E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl & - E1000_CTRL_RFCE) ? "RX" : ((ctrl & - E1000_CTRL_TFCE) ? "TX" : "None" ))); + "Full Duplex" : "Half Duplex", + ((ctrl & E1000_CTRL_TFCE) && (ctrl & + E1000_CTRL_RFCE)) ? + "RX/TX" : ((ctrl & E1000_CTRL_RFCE) ? "RX" + : ((ctrl & E1000_CTRL_TFCE) ? "TX" : + "None"))); /* adjust timeout factor according to speed/duplex */ adapter->tx_timeout_factor = 1; @@ -2451,7 +2449,7 @@ static void e1000_watchdog(unsigned long data) netif_carrier_on(netdev); if (!test_bit(__E1000_DOWN, &adapter->flags)) mod_timer(&adapter->phy_info_timer, - round_jiffies(jiffies + 2 * HZ)); + round_jiffies(jiffies + 2 * HZ)); adapter->smartspeed = 0; } } else { @@ -2464,7 +2462,7 @@ static void e1000_watchdog(unsigned long data) if (!test_bit(__E1000_DOWN, &adapter->flags)) mod_timer(&adapter->phy_info_timer, - round_jiffies(jiffies + 2 * HZ)); + round_jiffies(jiffies + 2 * HZ)); } e1000_smartspeed(adapter); @@ -2507,7 +2505,7 @@ link_up: /* Reset the timer */ if (!test_bit(__E1000_DOWN, &adapter->flags)) mod_timer(&adapter->watchdog_timer, - round_jiffies(jiffies + 2 * HZ)); + round_jiffies(jiffies + 2 * HZ)); } enum latency_range { @@ -2524,15 +2522,15 @@ enum latency_range { * @packets: the number of packets during this measurement interval * @bytes: the number of bytes during this measurement interval * - * Stores a new ITR value based on packets and byte - * counts during the last interrupt. The advantage of per interrupt - * computation is faster updates and more accurate ITR for the current - * traffic pattern. Constants in this function were computed - * based on theoretical maximum wire speed and thresholds were set based - * on testing data as well as attempting to minimize response time - * while increasing bulk throughput. - * this functionality is controlled by the InterruptThrottleRate module - * parameter (see e1000_param.c) + * Stores a new ITR value based on packets and byte + * counts during the last interrupt. The advantage of per interrupt + * computation is faster updates and more accurate ITR for the current + * traffic pattern. Constants in this function were computed + * based on theoretical maximum wire speed and thresholds were set based + * on testing data as well as attempting to minimize response time + * while increasing bulk throughput. + * this functionality is controlled by the InterruptThrottleRate module + * parameter (see e1000_param.c) **/ static unsigned int e1000_update_itr(struct e1000_adapter *adapter, u16 itr_setting, int packets, int bytes) @@ -2599,17 +2597,17 @@ static void e1000_set_itr(struct e1000_adapter *adapter) } adapter->tx_itr = e1000_update_itr(adapter, - adapter->tx_itr, - adapter->total_tx_packets, - adapter->total_tx_bytes); + adapter->tx_itr, + adapter->total_tx_packets, + adapter->total_tx_bytes); /* conservative mode (itr 3) eliminates the lowest_latency setting */ if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency) adapter->tx_itr = low_latency; adapter->rx_itr = e1000_update_itr(adapter, - adapter->rx_itr, - adapter->total_rx_packets, - adapter->total_rx_bytes); + adapter->rx_itr, + adapter->total_rx_packets, + adapter->total_rx_bytes); /* conservative mode (itr 3) eliminates the lowest_latency setting */ if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency) adapter->rx_itr = low_latency; @@ -2637,8 +2635,8 @@ set_itr_now: * by adding intermediate steps when interrupt rate is * increasing */ new_itr = new_itr > adapter->itr ? - min(adapter->itr + (new_itr >> 2), new_itr) : - new_itr; + min(adapter->itr + (new_itr >> 2), new_itr) : + new_itr; adapter->itr = new_itr; ew32(ITR, 1000000000 / (new_itr * 256)); } @@ -2710,7 +2708,7 @@ static int e1000_tso(struct e1000_adapter *adapter, context_desc->upper_setup.tcp_fields.tucss = tucss; context_desc->upper_setup.tcp_fields.tucso = tucso; context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse); - context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss); + context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss); context_desc->tcp_seg_setup.fields.hdr_len = hdr_len; context_desc->cmd_and_length = cpu_to_le32(cmd_length); @@ -2750,7 +2748,7 @@ static bool e1000_tx_csum(struct e1000_adapter *adapter, default: if (unlikely(net_ratelimit())) DPRINTK(DRV, WARNING, - "checksum_partial proto=%x!\n", skb->protocol); + "checksum_partial proto=%x!\n", skb->protocol); break; } @@ -2818,8 +2816,8 @@ static int e1000_tx_map(struct e1000_adapter *adapter, * packet is smaller than 2048 - 16 - 16 (or 2016) bytes */ if (unlikely((hw->bus_type == e1000_bus_type_pcix) && - (size > 2015) && count == 0)) - size = 2015; + (size > 2015) && count == 0)) + size = 2015; /* Workaround for potential 82544 hang in PCI-X. Avoid * terminating buffers within evenly-aligned dwords. */ @@ -2871,7 +2869,7 @@ static int e1000_tx_map(struct e1000_adapter *adapter, * dwords. */ if (unlikely(adapter->pcix_82544 && !((unsigned long)(page_to_phys(frag->page) + offset - + size - 1) & 4) && + + size - 1) & 4) && size > 4)) size -= 4; @@ -2925,7 +2923,7 @@ static void e1000_tx_queue(struct e1000_adapter *adapter, if (likely(tx_flags & E1000_TX_FLAGS_TSO)) { txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D | - E1000_TXD_CMD_TSE; + E1000_TXD_CMD_TSE; txd_upper |= E1000_TXD_POPTS_TXSM << 8; if (likely(tx_flags & E1000_TX_FLAGS_IPV4)) @@ -2973,7 +2971,7 @@ static void e1000_tx_queue(struct e1000_adapter *adapter, * 82547 workaround to avoid controller hang in half-duplex environment. * The workaround is to avoid queuing a large packet that would span * the internal Tx FIFO ring boundary by notifying the stack to resend - * the packet at a later time. This gives the Tx FIFO an opportunity to + * the packet at a later time. This gives the Tx FIFO an opportunity to * flush all packets. When that occurs, we reset the Tx FIFO pointers * to the beginning of the Tx FIFO. **/ @@ -3030,7 +3028,7 @@ static int __e1000_maybe_stop_tx(struct net_device *netdev, int size) } static int e1000_maybe_stop_tx(struct net_device *netdev, - struct e1000_tx_ring *tx_ring, int size) + struct e1000_tx_ring *tx_ring, int size) { if (likely(E1000_DESC_UNUSED(tx_ring) >= size)) return 0; @@ -3068,7 +3066,7 @@ static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb, mss = skb_shinfo(skb)->gso_size; /* The controller does a simple calculation to * make sure there is enough room in the FIFO before - * initiating the DMA for each buffer. The calc is: + * initiating the DMA for each buffer. The calc is: * 4 = ceil(buffer len/mss). To make sure we don't * overrun the FIFO, adjust the max buffer len if mss * drops. */ @@ -3145,7 +3143,7 @@ static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb, netif_stop_queue(netdev); if (!test_bit(__E1000_DOWN, &adapter->flags)) mod_timer(&adapter->tx_fifo_stall_timer, - jiffies + 1); + jiffies + 1); return NETDEV_TX_BUSY; } } @@ -3174,7 +3172,7 @@ static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb, tx_flags |= E1000_TX_FLAGS_IPV4; count = e1000_tx_map(adapter, tx_ring, skb, first, max_per_txd, - nr_frags, mss); + nr_frags, mss); if (count) { e1000_tx_queue(adapter, tx_ring, tx_flags, count); @@ -3435,8 +3433,8 @@ void e1000_update_stats(struct e1000_adapter *adapter) /* Phy Stats */ if (hw->media_type == e1000_media_type_copper - || (hw->media_type == e1000_media_type_oem - && e1000_oem_phy_is_copper(&adapter->hw))) { + || (hw->media_type == e1000_media_type_oem + && e1000_oem_phy_is_copper(&adapter->hw))) { if ((adapter->link_speed == SPEED_1000) && (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) { phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK; @@ -3563,7 +3561,7 @@ static bool e1000_clean_tx_irq(struct e1000_adapter *adapter, segs = skb_shinfo(skb)->gso_segs ?: 1; /* multiply data chunks by size of headers */ bytecount = ((segs - 1) * skb_headlen(skb)) + - skb->len; + skb->len; total_tx_packets += segs; total_tx_bytes += bytecount; } @@ -3600,20 +3598,20 @@ static bool e1000_clean_tx_irq(struct e1000_adapter *adapter, adapter->detect_tx_hung = false; if (tx_ring->buffer_info[eop].time_stamp && time_after(jiffies, tx_ring->buffer_info[eop].time_stamp + - (adapter->tx_timeout_factor * HZ)) && + (adapter->tx_timeout_factor * HZ)) && !(er32(STATUS) & E1000_STATUS_TXOFF)) { /* detected Tx unit hang */ DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n" - " Tx Queue <%lu>\n" - " TDH <%x>\n" - " TDT <%x>\n" - " next_to_use <%x>\n" - " next_to_clean <%x>\n" + " Tx Queue <%lu>\n" + " TDH <%x>\n" + " TDT <%x>\n" + " next_to_use <%x>\n" + " next_to_clean <%x>\n" "buffer_info[next_to_clean]\n" - " time_stamp <%lx>\n" - " next_to_watch <%x>\n" - " jiffies <%lx>\n" + " time_stamp <%lx>\n" + " next_to_watch <%x>\n" + " jiffies <%lx>\n" " next_to_watch.status <%x>\n", (unsigned long)((tx_ring - adapter->tx_ring) / sizeof(struct e1000_tx_ring)), @@ -3637,10 +3635,10 @@ static bool e1000_clean_tx_irq(struct e1000_adapter *adapter, /** * e1000_rx_checksum - Receive Checksum Offload for 82543 - * @adapter: board private structure + * @adapter: board private structure * @status_err: receive descriptor status and error fields - * @csum: receive descriptor csum field - * @sk_buff: socket buffer with received data + * @csum: receive descriptor csum field + * @sk_buff: socket buffer with received data **/ static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err, @@ -3677,7 +3675,7 @@ static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err, * e1000_consume_page - helper function **/ static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb, - u16 length) + u16 length) { bi->page = NULL; skb->len += length; @@ -3697,8 +3695,8 @@ static void e1000_receive_skb(struct e1000_adapter *adapter, u8 status, { if (unlikely(adapter->vlgrp && (status & E1000_RXD_STAT_VP))) { vlan_hwaccel_receive_skb(skb, adapter->vlgrp, - le16_to_cpu(vlan) & - E1000_RXD_SPC_VLAN_MASK); + le16_to_cpu(vlan) & + E1000_RXD_SPC_VLAN_MASK); } else { netif_receive_skb(skb); } @@ -3755,7 +3753,7 @@ static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter, cleaned = true; cleaned_count++; pci_unmap_page(pdev, buffer_info->dma, buffer_info->length, - PCI_DMA_FROMDEVICE); + PCI_DMA_FROMDEVICE); buffer_info->dma = 0; length = le16_to_cpu(rx_desc->length); @@ -3767,11 +3765,11 @@ static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter, if (TBI_ACCEPT(hw, status, rx_desc->errors, length, last_byte)) { spin_lock_irqsave(&adapter->stats_lock, - irq_flags); + irq_flags); e1000_tbi_adjust_stats(hw, &adapter->stats, - length, skb->data); + length, skb->data); spin_unlock_irqrestore(&adapter->stats_lock, - irq_flags); + irq_flags); length--; } else { /* recycle both page and skb */ @@ -3792,7 +3790,7 @@ static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter, /* this is the beginning of a chain */ rxtop = skb; skb_fill_page_desc(rxtop, 0, buffer_info->page, - 0, length); + 0, length); } else { /* this is the middle of a chain */ skb_fill_page_desc(rxtop, @@ -3822,28 +3820,29 @@ static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter, skb_tailroom(skb) >= length) { u8 *vaddr; vaddr = kmap_atomic(buffer_info->page, - KM_SKB_DATA_SOFTIRQ); - memcpy(skb_tail_pointer(skb), vaddr, length); + KM_SKB_DATA_SOFTIRQ); + memcpy(skb_tail_pointer(skb), vaddr, + length); kunmap_atomic(vaddr, - KM_SKB_DATA_SOFTIRQ); + KM_SKB_DATA_SOFTIRQ); /* re-use the page, so don't erase * buffer_info->page */ skb_put(skb, length); } else { skb_fill_page_desc(skb, 0, - buffer_info->page, 0, - length); + buffer_info->page, 0, + length); e1000_consume_page(buffer_info, skb, - length); + length); } } } /* Receive Checksum Offload XXX recompute due to CRC strip? */ e1000_rx_checksum(adapter, - (u32)(status) | - ((u32)(rx_desc->errors) << 24), - le16_to_cpu(rx_desc->csum), skb); + (u32)(status) | + ((u32)(rx_desc->errors) << 24), + le16_to_cpu(rx_desc->csum), skb); pskb_trim(skb, skb->len - 4); @@ -3938,7 +3937,7 @@ static bool e1000_clean_rx_irq(struct e1000_adapter *adapter, cleaned = true; cleaned_count++; pci_unmap_single(pdev, buffer_info->dma, buffer_info->length, - PCI_DMA_FROMDEVICE); + PCI_DMA_FROMDEVICE); buffer_info->dma = 0; length = le16_to_cpu(rx_desc->length); @@ -3968,9 +3967,9 @@ static bool e1000_clean_rx_irq(struct e1000_adapter *adapter, last_byte)) { spin_lock_irqsave(&adapter->stats_lock, flags); e1000_tbi_adjust_stats(hw, &adapter->stats, - length, skb->data); + length, skb->data); spin_unlock_irqrestore(&adapter->stats_lock, - flags); + flags); length--; } else { /* recycle */ @@ -3997,9 +3996,9 @@ static bool e1000_clean_rx_irq(struct e1000_adapter *adapter, skb_copy_to_linear_data_offset(new_skb, -NET_IP_ALIGN, (skb->data - - NET_IP_ALIGN), + NET_IP_ALIGN), (length + - NET_IP_ALIGN)); + NET_IP_ALIGN)); /* save the skb in buffer_info as good */ buffer_info->skb = skb; skb = new_skb; @@ -4054,7 +4053,7 @@ next_desc: static void e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter, - struct e1000_rx_ring *rx_ring, int cleaned_count) + struct e1000_rx_ring *rx_ring, int cleaned_count) { struct net_device *netdev = adapter->netdev; struct pci_dev *pdev = adapter->pdev; @@ -4119,9 +4118,9 @@ check_page: if (!buffer_info->dma) { buffer_info->dma = pci_map_page(pdev, - buffer_info->page, 0, - buffer_info->length, - PCI_DMA_FROMDEVICE); + buffer_info->page, 0, + buffer_info->length, + PCI_DMA_FROMDEVICE); if (pci_dma_mapping_error(pdev, buffer_info->dma)) { put_page(buffer_info->page); dev_kfree_skb(skb); @@ -4306,7 +4305,7 @@ static void e1000_smartspeed(struct e1000_adapter *adapter) adapter->smartspeed++; if (!e1000_phy_setup_autoneg(hw) && !e1000_read_phy_reg(hw, PHY_CTRL, - &phy_ctrl)) { + &phy_ctrl)) { phy_ctrl |= (MII_CR_AUTO_NEG_EN | MII_CR_RESTART_AUTO_NEG); e1000_write_phy_reg(hw, PHY_CTRL, @@ -4368,10 +4367,10 @@ static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, u16 spddplx; unsigned long flags; - if((adapter->hw.media_type == e1000_media_type_oem - && !e1000_oem_phy_is_copper(&adapter->hw)) - || (adapter->hw.media_type != e1000_media_type_copper - && adapter->hw.media_type != e1000_media_type_oem)) + if ((adapter->hw.media_type == e1000_media_type_oem + && !e1000_oem_phy_is_copper(&adapter->hw)) + || (adapter->hw.media_type != e1000_media_type_copper + && adapter->hw.media_type != e1000_media_type_oem)) return -EOPNOTSUPP; switch (cmd) { @@ -4398,14 +4397,11 @@ static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, return -EIO; } spin_unlock_irqrestore(&adapter->stats_lock, flags); - if (adapter->hw.phy_type == e1000_phy_oem) - { - retval = e1000_oem_mii_ioctl(adapter, flags, ifr, cmd); - if(retval) { - return retval; - } - } - else if (hw->media_type == e1000_media_type_copper) { + if (adapter->hw.phy_type == e1000_phy_oem) { + retval = e1000_oem_mii_ioctl(adapter, flags, ifr, cmd); + if (retval) + return retval; + } else if (hw->media_type == e1000_media_type_copper) { switch (data->reg_num) { case PHY_CTRL: if (mii_reg & MII_CR_POWER_DOWN) @@ -4593,10 +4589,10 @@ int e1000_set_spd_dplx(struct e1000_adapter *adapter, u16 spddplx) hw->autoneg = 0; /* Fiber NICs only allow 1000 gbps Full duplex */ - if((adapter->hw.media_type == e1000_media_type_fiber - || (adapter->hw.media_type == e1000_media_type_oem - && !e1000_oem_phy_is_copper(&adapter->hw))) - && spddplx != (SPEED_1000 + DUPLEX_FULL)) { + if ((adapter->hw.media_type == e1000_media_type_fiber + || (adapter->hw.media_type == e1000_media_type_oem + && !e1000_oem_phy_is_copper(&adapter->hw))) + && spddplx != (SPEED_1000 + DUPLEX_FULL)) { DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n"); return -EINVAL; } @@ -4650,24 +4646,22 @@ static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake) return retval; #endif - /* - * ICP_XXXX style MACs do not have a link up bit in - * the STATUS register, query the PHY directly - */ - if(adapter->hw.mac_type != e1000_icp_xxxx) { - status = er32(STATUS); - if(status & E1000_STATUS_LU) { - wufc &= ~E1000_WUFC_LNKC; - } - } else { - int isUp = 0x0; - if(e1000_oem_phy_is_link_up(&adapter->hw, &isUp) != E1000_SUCCESS) { - isUp = 0x0; - } - if(isUp) { - wufc &= ~E1000_WUFC_LNKC; - } - } + /* + * ICP_XXXX style MACs do not have a link up bit in + * the STATUS register, query the PHY directly + */ + if (adapter->hw.mac_type != e1000_icp_xxxx) { + status = er32(STATUS); + if (status & E1000_STATUS_LU) + wufc &= ~E1000_WUFC_LNKC; + } else { + int isUp = 0; + if (e1000_oem_phy_is_link_up(&adapter->hw, &isUp) != + E1000_SUCCESS) + isUp = 0; + if (isUp) + wufc &= ~E1000_WUFC_LNKC; + } if (wufc) { e1000_setup_rctl(adapter); @@ -4687,8 +4681,8 @@ static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake) /* phy power management enable */ #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000 ctrl |= E1000_CTRL_ADVD3WUC | - (adapter->hw.mac_type != e1000_icp_xxxx - ? E1000_CTRL_EN_PHY_PWR_MGMT : 0x0); + (adapter->hw.mac_type != e1000_icp_xxxx + ? E1000_CTRL_EN_PHY_PWR_MGMT : 0x0); ew32(CTRL, ctrl); } @@ -4726,11 +4720,11 @@ static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake) #ifdef CONFIG_PM static int e1000_suspend(struct pci_dev *pdev, pm_message_t state) { - struct net_device *netdev = pci_get_drvdata(pdev); - struct e1000_adapter *adapter = netdev_priv(netdev); + struct net_device *netdev = pci_get_drvdata(pdev); + struct e1000_adapter *adapter = netdev_priv(netdev); int retval; bool wake; - u16 cmd_word; + u16 cmd_word; retval = __e1000_shutdown(pdev, &wake); if (retval) @@ -4743,36 +4737,32 @@ static int e1000_suspend(struct pci_dev *pdev, pm_message_t state) pci_set_power_state(pdev, PCI_D3hot); } - if(adapter->hw.mac_type == e1000_icp_xxxx) { - /* - * ICP xxxx devices are not true PCI devices, in the context - * of power management, disabling the bus mastership is not - * sufficient to disable the device, it is also necessary to - * disable IO, Memory, and Interrupts if they are enabled. - */ - pci_read_config_word(pdev, PCI_COMMAND, &cmd_word); - if(cmd_word & PCI_COMMAND_IO) { - cmd_word &= ~PCI_COMMAND_IO; - } - if(cmd_word & PCI_COMMAND_MEMORY) { - cmd_word &= ~PCI_COMMAND_MEMORY; - } - if(cmd_word & PCI_COMMAND_INTX_DISABLE) { - cmd_word &= ~PCI_COMMAND_INTX_DISABLE; - } - pci_write_config_word(pdev, PCI_COMMAND, cmd_word); - } + if (adapter->hw.mac_type == e1000_icp_xxxx) { + /* + * ICP xxxx devices are not true PCI devices, in the context + * of power management, disabling the bus mastership is not + * sufficient to disable the device, it is also necessary to + * disable IO, Memory, and Interrupts if they are enabled. + */ + pci_read_config_word(pdev, PCI_COMMAND, &cmd_word); + + cmd_word &= ~PCI_COMMAND_IO; + cmd_word &= ~PCI_COMMAND_MEMORY; + cmd_word &= ~PCI_COMMAND_INTX_DISABLE; + + pci_write_config_word(pdev, PCI_COMMAND, cmd_word); + } #ifdef CONFIG_E1000_EP80579 - if(gcu_suspend == 0x0) - { - if(gcu == NULL) { - gcu = pci_get_device(PCI_VENDOR_ID_INTEL, GCU_DEVID, NULL); - } - gcu_e1000_suspend(gcu, 0x3); - gcu_suspend = 0x1; - gcu_resume = 0x0; - } + if (gcu_suspend == 0x0) { + if (gcu == NULL) + gcu = + pci_get_device(PCI_VENDOR_ID_INTEL, GCU_DEVID, + NULL); + gcu_e1000_suspend(gcu, 0x3); + gcu_suspend = 0x1; + gcu_resume = 0x0; + } #endif return 0; @@ -4784,24 +4774,25 @@ static int e1000_resume(struct pci_dev *pdev) struct e1000_adapter *adapter = netdev_priv(netdev); struct e1000_hw *hw = &adapter->hw; u32 err; - u32 vdid; + u32 vdid; #ifdef CONFIG_E1000_EP80579 - if(gcu_resume == 0x0) - { - if(gcu == NULL) { - gcu = pci_get_device(PCI_VENDOR_ID_INTEL, GCU_DEVID, NULL); - pci_read_config_dword(gcu, 0x00, &vdid); - } - - if(gcu) { - gcu_e1000_resume(gcu); - gcu_resume = 0x1; - gcu_suspend = 0x0; - } else { - printk("Unable to resume GCU!\n"); - } - } + if (gcu_resume == 0x0) { + if (gcu == NULL) { + gcu = + pci_get_device(PCI_VENDOR_ID_INTEL, GCU_DEVID, + NULL); + pci_read_config_dword(gcu, 0x00, &vdid); + } + + if (gcu) { + gcu_e1000_resume(gcu); + gcu_resume = 0x1; + gcu_suspend = 0x0; + } else { + printk(KERN_ERROR "Unable to resume GCU!\n"); + } + } #endif pci_set_power_state(pdev, PCI_D0); diff --git a/e1000_oem_phy.c b/e1000_oem_phy.c index b8402d8..cbea0e4 100644 --- a/e1000_oem_phy.c +++ b/e1000_oem_phy.c @@ -68,8 +68,7 @@ static int32_t e1000_oem_link_v8601_setup(struct e1000_hw *hw); static int32_t e1000_oem_set_phy_mode(struct e1000_hw *hw); static int32_t e1000_oem_detect_phy(struct e1000_hw *hw); -#define NON_PHY_PORT 0xFFFFFFFF -//#define KINGS_BEACH +#define NON_PHY_PORT 0xFFFFFFFF #define SILVERTIP_BC5860 #define DEBUGFUNC1(F, B...) DEBUGOUT1(F, B) @@ -83,131 +82,127 @@ static int32_t e1000_oem_detect_phy(struct e1000_hw *hw); * Performs OEM Transceiver specific link setup as part of the * global e1000_setup_link() function. **/ -int32_t -e1000_oem_setup_link(struct e1000_hw *hw) +int32_t e1000_oem_setup_link(struct e1000_hw *hw) { #ifdef EXTERNAL_MDIO - /* - * see e1000_setup_copper_link() as the primary example. Look at both - * the M88 and IGP functions that are called for ideas, possibly for - * power management. - */ - - int32_t ret_val; - uint32_t ctrl; - uint16_t i; - uint16_t phy_data; - - DEBUGFUNC1("%s",__func__); - - if(!hw) { - return -1; - } - /* AFU: add test to exit out if improper phy type - */ - /* relevent parts of e1000_copper_link_preconfig */ - ctrl = E1000_READ_REG(hw, CTRL); - ctrl |= E1000_CTRL_SLU; - ctrl &= ~(E1000_CTRL_FRCSPD | E1000_CTRL_FRCDPX); - E1000_WRITE_REG(hw, CTRL, ctrl); - - /* this is required for *hw init */ - ret_val = e1000_oem_detect_phy(hw); - if(ret_val) { - return ret_val; - } - ret_val = e1000_oem_set_phy_mode(hw); - if(ret_val) { - return ret_val; - } - - - switch (hw->phy_id) { - case M88E1000_I_PHY_ID: - case M88E1141_E_PHY_ID: - ret_val = e1000_oem_link_m88_setup(hw); - if(ret_val) { - return ret_val; - } - break; - case VSC8211_E_PHY_ID: - ret_val = e1000_oem_link_v8211_setup(hw); - if(ret_val) { - return ret_val; - } - break; - case VSC8601_E_PHY_ID: - ret_val = e1000_oem_link_v8601_setup(hw); - if(ret_val) { - return ret_val; - } - break; - - case NON_PHY_PORT: - hw->icp_xxxx_is_link_up = TRUE; - /* Reture for skipping the latter blocks about autoneg and - link status checking */ + /* + * see e1000_setup_copper_link() as the primary example. Look at both + * the M88 and IGP functions that are called for ideas, possibly for + * power management. + */ + + int32_t ret_val; + uint32_t ctrl; + uint16_t i; + uint16_t phy_data; + + DEBUGFUNC1("%s", __func__); + + if (!hw) + return -1; + + /* AFU: add test to exit out if improper phy type + */ + /* relevent parts of e1000_copper_link_preconfig */ + ctrl = E1000_READ_REG(hw, CTRL); + ctrl |= E1000_CTRL_SLU; + ctrl &= ~(E1000_CTRL_FRCSPD | E1000_CTRL_FRCDPX); + E1000_WRITE_REG(hw, CTRL, ctrl); + + /* this is required for *hw init */ + ret_val = e1000_oem_detect_phy(hw); + if (ret_val) { + return ret_val; + } + ret_val = e1000_oem_set_phy_mode(hw); + if (ret_val) { + return ret_val; + } + + switch (hw->phy_id) { + case M88E1000_I_PHY_ID: + case M88E1141_E_PHY_ID: + ret_val = e1000_oem_link_m88_setup(hw); + if (ret_val) { + return ret_val; + } + break; + case VSC8211_E_PHY_ID: + ret_val = e1000_oem_link_v8211_setup(hw); + if (ret_val) { + return ret_val; + } + break; + case VSC8601_E_PHY_ID: + ret_val = e1000_oem_link_v8601_setup(hw); + if (ret_val) { + return ret_val; + } + break; + + case NON_PHY_PORT: + hw->icp_xxxx_is_link_up = TRUE; + /* Reture for skipping the latter blocks about autoneg and + link status checking */ + return E1000_SUCCESS; + default: + DEBUGOUT("Invalid PHY ID\n"); + return -E1000_ERR_PHY_TYPE; + } + + if (hw->autoneg) { + ret_val = e1000_copper_link_autoneg(hw); + if (ret_val) { + return ret_val; + } + } else { + DEBUGOUT("Forcing speed and duplex\n"); + ret_val = e1000_phy_force_speed_duplex(hw); + } + + /* + * Check link status. Wait up to 100 microseconds for link to become + * valid. + */ + for (i = 0; i < 0xa; i++) { + ret_val = e1000_oem_read_phy_reg_ex(hw, PHY_STATUS, &phy_data); + if (ret_val) { + DEBUGOUT("Unable to read register PHY_STATUS\n"); + return ret_val; + } + + ret_val = e1000_oem_read_phy_reg_ex(hw, PHY_STATUS, &phy_data); + if (ret_val) { + DEBUGOUT("Unable to read register PHY_STATUS\n"); + return ret_val; + } + + hw->icp_xxxx_is_link_up = (phy_data & MII_SR_LINK_STATUS) != 0; + + if (phy_data & MII_SR_LINK_STATUS) { + /* Config the MAC and PHY after link is up */ + ret_val = e1000_copper_link_postconfig(hw); + if (ret_val) { + return ret_val; + } + DEBUGOUT("Valid link established!!!\n"); return E1000_SUCCESS; - default: - DEBUGOUT("Invalid PHY ID\n"); - return -E1000_ERR_PHY_TYPE; - } - - if(hw->autoneg) { - ret_val = e1000_copper_link_autoneg(hw); - if(ret_val) { - return ret_val; - } - } - else { - DEBUGOUT("Forcing speed and duplex\n"); - ret_val = e1000_phy_force_speed_duplex(hw); - } - - /* - * Check link status. Wait up to 100 microseconds for link to become - * valid. - */ - for(i = 0; i < 0xa; i++) { - ret_val = e1000_oem_read_phy_reg_ex(hw, PHY_STATUS, &phy_data); - if(ret_val) { - DEBUGOUT("Unable to read register PHY_STATUS\n"); - return ret_val; - } - - ret_val = e1000_oem_read_phy_reg_ex(hw, PHY_STATUS, &phy_data); - if(ret_val) { - DEBUGOUT("Unable to read register PHY_STATUS\n"); - return ret_val; - } - - hw->icp_xxxx_is_link_up = (phy_data & MII_SR_LINK_STATUS) != 0; - - if(phy_data & MII_SR_LINK_STATUS) { - /* Config the MAC and PHY after link is up */ - ret_val = e1000_copper_link_postconfig(hw); - if(ret_val) { - return ret_val; - } - DEBUGOUT("Valid link established!!!\n"); - return E1000_SUCCESS; - } - udelay(0xa); - } - - DEBUGOUT("Unable to establish link!!!\n"); - return E1000_SUCCESS; + } + udelay(0xa); + } + + DEBUGOUT("Unable to establish link!!!\n"); + return E1000_SUCCESS; #else /* ifdef EXTERNAL_MDIO */ - DEBUGOUT("Invalid value for hw->media_type"); - return -E1000_ERR_PHY_TYPE; + DEBUGOUT("Invalid value for hw->media_type"); + return -E1000_ERR_PHY_TYPE; #endif /* ifdef EXTERNAL_MDIO */ } - /** * e1000_oem_link_m88_setup * @hw: e1000_hw struct containing device specific information @@ -217,123 +212,126 @@ e1000_oem_setup_link(struct e1000_hw *hw) * lifted from e1000_copper_link_mgp_setup, pretty much * copied verbatim except replace e1000_phy_reset with e1000_phy_hw_reset **/ -static int32_t -e1000_oem_link_m88_setup(struct e1000_hw *hw) +static int32_t e1000_oem_link_m88_setup(struct e1000_hw *hw) { - int32_t ret_val; - uint16_t phy_data = 0; - - DEBUGFUNC1("%s",__func__); - - if(!hw) { - return -1; - } - - ret_val = e1000_oem_read_phy_reg_ex(hw, M88E1000_PHY_SPEC_CTRL, - &phy_data); - phy_data |= 0x00000008; - ret_val = e1000_oem_write_phy_reg_ex(hw, M88E1000_PHY_SPEC_CTRL, phy_data); - - /* phy_reset_disable is set in e1000_oem_set_phy_mode */ - if(hw->phy_reset_disable) { - return E1000_SUCCESS; - } - /* Enable CRS on TX. This must be set for half-duplex operation. */ - ret_val = e1000_oem_read_phy_reg_ex(hw, M88E1000_PHY_SPEC_CTRL, &phy_data); - if(ret_val) { - DEBUGOUT("Unable to read M88E1000_PHY_SPEC_CTRL register\n"); - return ret_val; - } - - phy_data &= ~M88E1000_PSCR_ASSERT_CRS_ON_TX; - - /* - * Options: - * MDI/MDI-X = 0 (default) - * 0 - Auto for all speeds - * 1 - MDI mode - * 2 - MDI-X mode - * 3 - Auto for 1000Base-T only (MDI-X for 10/100Base-T modes) - */ - phy_data &= ~M88E1000_PSCR_AUTO_X_MODE; - - switch (hw->mdix) { - case 0x1: - phy_data |= M88E1000_PSCR_MDI_MANUAL_MODE; - break; - case 0x2: - phy_data |= M88E1000_PSCR_MDIX_MANUAL_MODE; - break; - case 0x3: - phy_data |= M88E1000_PSCR_AUTO_X_1000T; - break; - case 0: - default: - phy_data |= M88E1000_PSCR_AUTO_X_MODE; - break; - } - - /* - * Options: - * disable_polarity_correction = 0 (default) - * Automatic Correction for Reversed Cable Polarity - * 0 - Disabled - * 1 - Enabled - */ - phy_data &= ~M88E1000_PSCR_POLARITY_REVERSAL; - - if(hw->disable_polarity_correction == 1) { - phy_data |= M88E1000_PSCR_POLARITY_REVERSAL; - } - ret_val = e1000_oem_write_phy_reg_ex(hw, M88E1000_PHY_SPEC_CTRL, phy_data); - if(ret_val) { - DEBUGOUT("Unable to write M88E1000_PHY_SPEC_CTRL register\n"); - return ret_val; - } - - /* - * Force TX_CLK in the Extended PHY Specific Control Register - * to 25MHz clock. - */ - ret_val = e1000_oem_read_phy_reg_ex(hw, M88E1000_EXT_PHY_SPEC_CTRL, - &phy_data); - if(ret_val) { - DEBUGOUT("Unable to read M88E1000_EXT_PHY_SPEC_CTRL register\n"); - return ret_val; - } - - /* - * For Truxton, it is necessary to add RGMII tx and rx - * timing delay though the EXT_PHY_SPEC_CTRL register - */ - phy_data |= M88E1000_EPSCR_TX_TIME_CTRL; - phy_data |= M88E1000_EPSCR_RX_TIME_CTRL; - - if (hw->phy_revision < M88E1011_I_REV_4) { - - phy_data |= M88E1000_EPSCR_TX_CLK_25; - /* Configure Master and Slave downshift values */ - phy_data &= ~(M88E1000_EPSCR_MASTER_DOWNSHIFT_MASK | - M88E1000_EPSCR_SLAVE_DOWNSHIFT_MASK); - phy_data |= (M88E1000_EPSCR_MASTER_DOWNSHIFT_1X | - M88E1000_EPSCR_SLAVE_DOWNSHIFT_1X); - } - ret_val = e1000_oem_write_phy_reg_ex(hw, M88E1000_EXT_PHY_SPEC_CTRL, - phy_data); - if(ret_val) { - DEBUGOUT("Unable to read M88E1000_EXT_PHY_SPEC_CTRL register\n"); - return ret_val; - } - - - /* SW Reset the PHY so all changes take effect */ - ret_val = e1000_phy_hw_reset(hw); - if(ret_val) { - DEBUGOUT("Error Resetting the PHY\n"); - return ret_val; - } - - return E1000_SUCCESS; + int32_t ret_val; + uint16_t phy_data = 0; + + DEBUGFUNC1("%s", __func__); + + if (!hw) { + return -1; + } + + ret_val = e1000_oem_read_phy_reg_ex(hw, M88E1000_PHY_SPEC_CTRL, + &phy_data); + phy_data |= 0x00000008; + ret_val = + e1000_oem_write_phy_reg_ex(hw, M88E1000_PHY_SPEC_CTRL, phy_data); + + /* phy_reset_disable is set in e1000_oem_set_phy_mode */ + if (hw->phy_reset_disable) { + return E1000_SUCCESS; + } + /* Enable CRS on TX. This must be set for half-duplex operation. */ + ret_val = + e1000_oem_read_phy_reg_ex(hw, M88E1000_PHY_SPEC_CTRL, &phy_data); + if (ret_val) { + DEBUGOUT("Unable to read M88E1000_PHY_SPEC_CTRL register\n"); + return ret_val; + } + + phy_data &= ~M88E1000_PSCR_ASSERT_CRS_ON_TX; + + /* + * Options: + * MDI/MDI-X = 0 (default) + * 0 - Auto for all speeds + * 1 - MDI mode + * 2 - MDI-X mode + * 3 - Auto for 1000Base-T only (MDI-X for 10/100Base-T modes) + */ + phy_data &= ~M88E1000_PSCR_AUTO_X_MODE; + + switch (hw->mdix) { + case 0x1: + phy_data |= M88E1000_PSCR_MDI_MANUAL_MODE; + break; + case 0x2: + phy_data |= M88E1000_PSCR_MDIX_MANUAL_MODE; + break; + case 0x3: + phy_data |= M88E1000_PSCR_AUTO_X_1000T; + break; + case 0: + default: + phy_data |= M88E1000_PSCR_AUTO_X_MODE; + break; + } + + /* + * Options: + * disable_polarity_correction = 0 (default) + * Automatic Correction for Reversed Cable Polarity + * 0 - Disabled + * 1 - Enabled + */ + phy_data &= ~M88E1000_PSCR_POLARITY_REVERSAL; + + if (hw->disable_polarity_correction == 1) { + phy_data |= M88E1000_PSCR_POLARITY_REVERSAL; + } + ret_val = + e1000_oem_write_phy_reg_ex(hw, M88E1000_PHY_SPEC_CTRL, phy_data); + if (ret_val) { + DEBUGOUT("Unable to write M88E1000_PHY_SPEC_CTRL register\n"); + return ret_val; + } + + /* + * Force TX_CLK in the Extended PHY Specific Control Register + * to 25MHz clock. + */ + ret_val = e1000_oem_read_phy_reg_ex(hw, M88E1000_EXT_PHY_SPEC_CTRL, + &phy_data); + if (ret_val) { + DEBUGOUT + ("Unable to read M88E1000_EXT_PHY_SPEC_CTRL register\n"); + return ret_val; + } + + /* + * For Truxton, it is necessary to add RGMII tx and rx + * timing delay though the EXT_PHY_SPEC_CTRL register + */ + phy_data |= M88E1000_EPSCR_TX_TIME_CTRL; + phy_data |= M88E1000_EPSCR_RX_TIME_CTRL; + + if (hw->phy_revision < M88E1011_I_REV_4) { + + phy_data |= M88E1000_EPSCR_TX_CLK_25; + /* Configure Master and Slave downshift values */ + phy_data &= ~(M88E1000_EPSCR_MASTER_DOWNSHIFT_MASK | + M88E1000_EPSCR_SLAVE_DOWNSHIFT_MASK); + phy_data |= (M88E1000_EPSCR_MASTER_DOWNSHIFT_1X | + M88E1000_EPSCR_SLAVE_DOWNSHIFT_1X); + } + ret_val = e1000_oem_write_phy_reg_ex(hw, M88E1000_EXT_PHY_SPEC_CTRL, + phy_data); + if (ret_val) { + DEBUGOUT + ("Unable to read M88E1000_EXT_PHY_SPEC_CTRL register\n"); + return ret_val; + } + + /* SW Reset the PHY so all changes take effect */ + ret_val = e1000_phy_hw_reset(hw); + if (ret_val) { + DEBUGOUT("Error Resetting the PHY\n"); + return ret_val; + } + + return E1000_SUCCESS; } /** @@ -345,67 +343,66 @@ e1000_oem_link_m88_setup(struct e1000_hw *hw) * lifted from e1000_copper_link_mgp_setup, pretty much * copied verbatim except replace e1000_phy_reset with e1000_phy_hw_reset **/ -static int32_t -e1000_oem_link_v8211_setup(struct e1000_hw *hw) +static int32_t e1000_oem_link_v8211_setup(struct e1000_hw *hw) { - int32_t ret_val; - uint16_t phy_data; - - DEBUGFUNC1("%s",__func__); - - if(!hw) { - return -1; - } - - /* phy_reset_disable is set in e1000_oem_set_phy_mode */ - if(hw->phy_reset_disable) { - return E1000_SUCCESS; - } - - /* - * Options: - * disable_polarity_correction = 0 (default) - * Automatic Correction for Reversed Cable Polarity - * 0 - Disabled - * 1 - Enabled - */ - ret_val = e1000_oem_read_phy_reg_ex(hw, VSC8211_BYPASS_CTRL, &phy_data); - if (ret_val) { - DEBUGOUT("Unable to read VSC8211_BYPASS_CTRL register\n"); - return ret_val; - } - if ( hw->disable_polarity_correction ) - phy_data |= VSC8211_BYPASS_POLAR_INVERS_DISABLE; - else - phy_data &= ~VSC8211_BYPASS_POLAR_INVERS_DISABLE; - - e1000_oem_write_phy_reg_ex(hw, VSC8211_BYPASS_CTRL, phy_data); - - if (ret_val) { - DEBUGOUT("Unable to write VSC8211_BYPASS_CTRL register\n"); - return ret_val; - } - - /* Options: - * MDI/MDI-X = 0 (default) - * 0 - Auto for all speeds - * 1 - MDI mode - * 2 - MDI-X mode - * 3 - Auto for 1000Base-T only (MDI-X for 10/100Base-T modes) - */ - switch ( hw->mdix ) { - default: - break; - } - - /* SW Reset the PHY so all changes take effect */ - ret_val = e1000_phy_hw_reset(hw); - if ( ret_val ) { - DEBUGOUT("Error Resetting the PHY\n"); - return ret_val; - } - - return E1000_SUCCESS; + int32_t ret_val; + uint16_t phy_data; + + DEBUGFUNC1("%s", __func__); + + if (!hw) { + return -1; + } + + /* phy_reset_disable is set in e1000_oem_set_phy_mode */ + if (hw->phy_reset_disable) { + return E1000_SUCCESS; + } + + /* + * Options: + * disable_polarity_correction = 0 (default) + * Automatic Correction for Reversed Cable Polarity + * 0 - Disabled + * 1 - Enabled + */ + ret_val = e1000_oem_read_phy_reg_ex(hw, VSC8211_BYPASS_CTRL, &phy_data); + if (ret_val) { + DEBUGOUT("Unable to read VSC8211_BYPASS_CTRL register\n"); + return ret_val; + } + if (hw->disable_polarity_correction) + phy_data |= VSC8211_BYPASS_POLAR_INVERS_DISABLE; + else + phy_data &= ~VSC8211_BYPASS_POLAR_INVERS_DISABLE; + + e1000_oem_write_phy_reg_ex(hw, VSC8211_BYPASS_CTRL, phy_data); + + if (ret_val) { + DEBUGOUT("Unable to write VSC8211_BYPASS_CTRL register\n"); + return ret_val; + } + + /* Options: + * MDI/MDI-X = 0 (default) + * 0 - Auto for all speeds + * 1 - MDI mode + * 2 - MDI-X mode + * 3 - Auto for 1000Base-T only (MDI-X for 10/100Base-T modes) + */ + switch (hw->mdix) { + default: + break; + } + + /* SW Reset the PHY so all changes take effect */ + ret_val = e1000_phy_hw_reset(hw); + if (ret_val) { + DEBUGOUT("Error Resetting the PHY\n"); + return ret_val; + } + + return E1000_SUCCESS; } /** @@ -417,84 +414,80 @@ e1000_oem_link_v8211_setup(struct e1000_hw *hw) * lifted from e1000_copper_link_mgp_setup, pretty much * copied verbatim except replace e1000_phy_reset with e1000_phy_hw_reset **/ -static int32_t -e1000_oem_link_v8601_setup(struct e1000_hw *hw) +static int32_t e1000_oem_link_v8601_setup(struct e1000_hw *hw) { - int32_t ret_val; - uint16_t phy_data; - - DEBUGFUNC1("%s",__func__); - - - if(!hw) { - return -1; - } - - /* phy_reset_disable is set in e1000_oem_set_phy_mode */ - if(hw->phy_reset_disable) { - return E1000_SUCCESS; - } - - /* - * Options: - * disable_polarity_correction = 0 (default) - * Automatic Correction for Reversed Cable Polarity - * 0 - Disabled - * 1 - Enabled - */ - ret_val = e1000_oem_read_phy_reg_ex(hw, VSC8601_BYPASS_CTRL, &phy_data); - if (ret_val) { - DEBUGOUT("Unable to read VSC8601_BYPASS_CTRL register\n"); - return ret_val; - } - if ( hw->disable_polarity_correction ) - phy_data |= VSC8601_BYPASS_POLAR_INVERS_DISABLE; - else - phy_data &= ~VSC8601_BYPASS_POLAR_INVERS_DISABLE; - - e1000_oem_write_phy_reg_ex(hw, VSC8601_BYPASS_CTRL, phy_data); - - if (ret_val) { - DEBUGOUT("Unable to write VSC8601_BYPASS_CTRL register\n"); - return ret_val; - } - - /* Options: - * MDI/MDI-X = 0 (default) - * 0 - Auto for all speeds - * 1 - MDI mode - * 2 - MDI-X mode - * 3 - Auto for 1000Base-T only (MDI-X for 10/100Base-T modes) - */ - switch ( hw->mdix ) { - default: - break; - } - - /* SW Reset the PHY so all changes take effect */ - ret_val = e1000_phy_hw_reset(hw); - if ( ret_val ) { - DEBUGOUT("Error Resetting the PHY\n"); - return ret_val; - } - - // SDG - this is done to setup the LED mode correctly but should really - // be fixed in the hardware - phy_data = 0x0001; - e1000_oem_write_phy_reg_ex(hw, 31, phy_data); // switch to extended page registers - // phy_data = 0x0C17; // just link - phy_data = 0x0410; // blink mode - e1000_oem_write_phy_reg_ex(hw, 17, phy_data); // enhanced led mode, - // no activity (done by turning off combination feature) - phy_data = 0x0021; - e1000_oem_write_phy_reg_ex(hw, 16, phy_data); // link100 and link1000 - phy_data = 0x0000; - e1000_oem_write_phy_reg_ex(hw, 31, phy_data); // switch back to standard page registers - - return E1000_SUCCESS; + int32_t ret_val; + uint16_t phy_data; + + DEBUGFUNC1("%s", __func__); + + if (!hw) { + return -1; + } + + /* phy_reset_disable is set in e1000_oem_set_phy_mode */ + if (hw->phy_reset_disable) { + return E1000_SUCCESS; + } + + /* + * Options: + * disable_polarity_correction = 0 (default) + * Automatic Correction for Reversed Cable Polarity + * 0 - Disabled + * 1 - Enabled + */ + ret_val = e1000_oem_read_phy_reg_ex(hw, VSC8601_BYPASS_CTRL, &phy_data); + if (ret_val) { + DEBUGOUT("Unable to read VSC8601_BYPASS_CTRL register\n"); + return ret_val; + } + if (hw->disable_polarity_correction) + phy_data |= VSC8601_BYPASS_POLAR_INVERS_DISABLE; + else + phy_data &= ~VSC8601_BYPASS_POLAR_INVERS_DISABLE; + + e1000_oem_write_phy_reg_ex(hw, VSC8601_BYPASS_CTRL, phy_data); + + if (ret_val) { + DEBUGOUT("Unable to write VSC8601_BYPASS_CTRL register\n"); + return ret_val; + } + + /* Options: + * MDI/MDI-X = 0 (default) + * 0 - Auto for all speeds + * 1 - MDI mode + * 2 - MDI-X mode + * 3 - Auto for 1000Base-T only (MDI-X for 10/100Base-T modes) + */ + switch (hw->mdix) { + default: + break; + } + + /* SW Reset the PHY so all changes take effect */ + ret_val = e1000_phy_hw_reset(hw); + if (ret_val) { + DEBUGOUT("Error Resetting the PHY\n"); + return ret_val; + } + // SDG - this is done to setup the LED mode correctly but should really + // be fixed in the hardware + phy_data = 0x0001; + e1000_oem_write_phy_reg_ex(hw, 31, phy_data); // switch to extended page registers + // phy_data = 0x0C17; // just link + phy_data = 0x0410; // blink mode + e1000_oem_write_phy_reg_ex(hw, 17, phy_data); // enhanced led mode, + // no activity (done by turning off combination feature) + phy_data = 0x0021; + e1000_oem_write_phy_reg_ex(hw, 16, phy_data); // link100 and link1000 + phy_data = 0x0000; + e1000_oem_write_phy_reg_ex(hw, 31, phy_data); // switch back to standard page registers + + return E1000_SUCCESS; } - /** * e1000_oem_force_mdi * @hw: e1000_hw struct containing device specific information @@ -506,105 +499,113 @@ e1000_oem_link_v8601_setup(struct e1000_hw *hw) * This is called from e1000_phy_force_speed_duplex, which is * called from e1000_oem_setup_link. **/ -int32_t -e1000_oem_force_mdi(struct e1000_hw *hw, int *resetPhy) +int32_t e1000_oem_force_mdi(struct e1000_hw * hw, int *resetPhy) { #ifdef EXTERNAL_MDIO - uint16_t phy_data; - int32_t ret_val; - - DEBUGFUNC1("%s",__func__); - - if(!hw || !resetPhy) { - return -1; - } - - /* - * a boolean to indicate if the phy needs to be reset - * - * Make note that the M88 phy is what'll be used on Truxton - * see e1000_phy_force_speed_duplex, which does the following for M88 - */ - switch (hw->phy_id) { - case M88E1000_I_PHY_ID: - case M88E1141_E_PHY_ID: - ret_val = e1000_oem_read_phy_reg_ex(hw, - M88E1000_PHY_SPEC_CTRL, - &phy_data); - if(ret_val) { - DEBUGOUT("Unable to read M88E1000_PHY_SPEC_CTRL register\n"); - return ret_val; - } - - /* - * Clear Auto-Crossover to force MDI manually. M88E1000 requires - * MDI forced whenever speed are duplex are forced. - */ - - phy_data &= ~M88E1000_PSCR_AUTO_X_MODE; - ret_val = e1000_oem_write_phy_reg_ex(hw, M88E1000_PHY_SPEC_CTRL, - phy_data); - if(ret_val) { - DEBUGOUT("Unable to write M88E1000_PHY_SPEC_CTRL register\n"); - return ret_val; - } - *resetPhy = TRUE; - break; - case VSC8211_E_PHY_ID: - ret_val = e1000_oem_read_phy_reg_ex(hw, VSC8211_BYPASS_CTRL, &phy_data); - if (ret_val) { - DEBUGOUT("Unable to read VSC8211_BYPASS_CTRL register\n"); - return ret_val; - } - /* disable automatic MDI and MDI-X */ - phy_data |= VSC8211_BYPASS_AUTO_MDI_DISABLE; - e1000_oem_write_phy_reg_ex(hw, VSC8211_BYPASS_CTRL, phy_data); - if (ret_val) { - DEBUGOUT("Unable to write VSC8211_BYPASS_CTRL register\n"); - return ret_val; - } - *resetPhy = TRUE; - break; - case VSC8601_E_PHY_ID: - ret_val = e1000_oem_read_phy_reg_ex(hw, VSC8601_BYPASS_CTRL, &phy_data); - if (ret_val) { - DEBUGOUT("Unable to read VSC8601_BYPASS_CTRL register\n"); - return ret_val; - } - /* disable automatic MDI and MDI-X */ - phy_data |= VSC8601_BYPASS_AUTO_MDI_DISABLE; - e1000_oem_write_phy_reg_ex(hw, VSC8601_BYPASS_CTRL, phy_data); - if (ret_val) { - DEBUGOUT("Unable to write VSC8601_BYPASS_CTRL register\n"); - return ret_val; - } - *resetPhy = TRUE; - break; - - case NON_PHY_PORT: - *resetPhy = FALSE; - break; - default: - DEBUGOUT("Invalid PHY ID\n"); - return -E1000_ERR_PHY_TYPE; - } - - return E1000_SUCCESS; + uint16_t phy_data; + int32_t ret_val; + + DEBUGFUNC1("%s", __func__); + + if (!hw || !resetPhy) { + return -1; + } + + /* + * a boolean to indicate if the phy needs to be reset + * + * Make note that the M88 phy is what'll be used on Truxton + * see e1000_phy_force_speed_duplex, which does the following for M88 + */ + switch (hw->phy_id) { + case M88E1000_I_PHY_ID: + case M88E1141_E_PHY_ID: + ret_val = e1000_oem_read_phy_reg_ex(hw, + M88E1000_PHY_SPEC_CTRL, + &phy_data); + if (ret_val) { + DEBUGOUT + ("Unable to read M88E1000_PHY_SPEC_CTRL register\n"); + return ret_val; + } + + /* + * Clear Auto-Crossover to force MDI manually. M88E1000 requires + * MDI forced whenever speed are duplex are forced. + */ + + phy_data &= ~M88E1000_PSCR_AUTO_X_MODE; + ret_val = e1000_oem_write_phy_reg_ex(hw, M88E1000_PHY_SPEC_CTRL, + phy_data); + if (ret_val) { + DEBUGOUT + ("Unable to write M88E1000_PHY_SPEC_CTRL register\n"); + return ret_val; + } + *resetPhy = TRUE; + break; + case VSC8211_E_PHY_ID: + ret_val = + e1000_oem_read_phy_reg_ex(hw, VSC8211_BYPASS_CTRL, + &phy_data); + if (ret_val) { + DEBUGOUT + ("Unable to read VSC8211_BYPASS_CTRL register\n"); + return ret_val; + } + /* disable automatic MDI and MDI-X */ + phy_data |= VSC8211_BYPASS_AUTO_MDI_DISABLE; + e1000_oem_write_phy_reg_ex(hw, VSC8211_BYPASS_CTRL, phy_data); + if (ret_val) { + DEBUGOUT + ("Unable to write VSC8211_BYPASS_CTRL register\n"); + return ret_val; + } + *resetPhy = TRUE; + break; + case VSC8601_E_PHY_ID: + ret_val = + e1000_oem_read_phy_reg_ex(hw, VSC8601_BYPASS_CTRL, + &phy_data); + if (ret_val) { + DEBUGOUT + ("Unable to read VSC8601_BYPASS_CTRL register\n"); + return ret_val; + } + /* disable automatic MDI and MDI-X */ + phy_data |= VSC8601_BYPASS_AUTO_MDI_DISABLE; + e1000_oem_write_phy_reg_ex(hw, VSC8601_BYPASS_CTRL, phy_data); + if (ret_val) { + DEBUGOUT + ("Unable to write VSC8601_BYPASS_CTRL register\n"); + return ret_val; + } + *resetPhy = TRUE; + break; + + case NON_PHY_PORT: + *resetPhy = FALSE; + break; + default: + DEBUGOUT("Invalid PHY ID\n"); + return -E1000_ERR_PHY_TYPE; + } + + return E1000_SUCCESS; #else /* ifdef EXTERNAL_MDIO */ - if(!hw || !resetPhy) { - return -1; - } + if (!hw || !resetPhy) { + return -1; + } - *resetPhy = FALSE; - return -E1000_ERR_PHY_TYPE; + *resetPhy = FALSE; + return -E1000_ERR_PHY_TYPE; #endif /* ifdef EXTERNAL_MDIO */ } - /** * e1000_oem_phy_reset_dsp * @hw: e1000_hw struct containing device specific information @@ -614,48 +615,46 @@ e1000_oem_force_mdi(struct e1000_hw *hw, int *resetPhy) * This is called from e1000_phy_force_speed_duplex, which is * called from e1000_oem_setup_link. **/ -int32_t -e1000_oem_phy_reset_dsp(struct e1000_hw *hw) +int32_t e1000_oem_phy_reset_dsp(struct e1000_hw * hw) { #ifdef EXTERNAL_MDIO - DEBUGFUNC1("%s",__func__); - - if(!hw) { - return -1; - } - - /* - * Make note that the M88 phy is what'll be used on Truxton. - * - * See e1000_phy_force_speed_duplex, which calls e1000_phy_reset_dsp - * for the M88 PHY. The code as written references registers 29 and 30, - * which are reserved for the M88 used on Truxton, so this will be a - * no-op. - */ - switch (hw->phy_id) { - case M88E1000_I_PHY_ID: - case M88E1141_E_PHY_ID: - case VSC8211_E_PHY_ID: - case VSC8601_E_PHY_ID: - case NON_PHY_PORT: - DEBUGOUT("No DSP to reset on OEM PHY\n"); - break; - default: - DEBUGOUT("Invalid PHY ID\n"); - return -E1000_ERR_PHY_TYPE; - } - - return E1000_SUCCESS; + DEBUGFUNC1("%s", __func__); + + if (!hw) { + return -1; + } + + /* + * Make note that the M88 phy is what'll be used on Truxton. + * + * See e1000_phy_force_speed_duplex, which calls e1000_phy_reset_dsp + * for the M88 PHY. The code as written references registers 29 and 30, + * which are reserved for the M88 used on Truxton, so this will be a + * no-op. + */ + switch (hw->phy_id) { + case M88E1000_I_PHY_ID: + case M88E1141_E_PHY_ID: + case VSC8211_E_PHY_ID: + case VSC8601_E_PHY_ID: + case NON_PHY_PORT: + DEBUGOUT("No DSP to reset on OEM PHY\n"); + break; + default: + DEBUGOUT("Invalid PHY ID\n"); + return -E1000_ERR_PHY_TYPE; + } + + return E1000_SUCCESS; #else /* ifdef EXTERNAL_MDIO */ - return -E1000_ERR_PHY_TYPE; + return -E1000_ERR_PHY_TYPE; #endif /* ifdef EXTERNAL_MDIO */ } - /** * e1000_oem_cleanup_after_phy_reset * @hw: e1000_hw struct containing device specific information @@ -665,95 +664,96 @@ e1000_oem_phy_reset_dsp(struct e1000_hw *hw) * This is called from e1000_phy_force_speed_duplex, which is * called from e1000_oem_setup_link. **/ -int32_t -e1000_oem_cleanup_after_phy_reset(struct e1000_hw *hw) +int32_t e1000_oem_cleanup_after_phy_reset(struct e1000_hw * hw) { #ifdef EXTERNAL_MDIO - uint16_t phy_data; - int32_t ret_val; - - DEBUGFUNC1("%s",__func__); - - if(!hw) { - return -1; - } - - /* - * Make note that the M88 phy is what'll be used on Truxton. - * see e1000_phy_force_speed_duplex, which does the following for M88 - */ - switch (hw->phy_id) { - case M88E1000_I_PHY_ID: - case M88E1141_E_PHY_ID: - /* - * Because we reset the PHY above, we need to re-force - * TX_CLK in the Extended PHY Specific Control Register to - * 25MHz clock. This value defaults back to a 2.5MHz clock - * when the PHY is reset. - */ - - ret_val = e1000_oem_read_phy_reg_ex(hw, - M88E1000_EXT_PHY_SPEC_CTRL, - &phy_data); - if(ret_val) { - DEBUGOUT("Unable to read M88E1000_EXT_SPEC_CTRL register\n"); - return ret_val; - } - - phy_data |= M88E1000_EPSCR_TX_CLK_25; - ret_val = e1000_oem_write_phy_reg_ex(hw, - M88E1000_EXT_PHY_SPEC_CTRL, - phy_data); - if(ret_val) { - DEBUGOUT("Unable to write M88E1000_EXT_PHY_SPEC_CTRL " - "register\n"); - return ret_val; - } - - /* - * In addition, because of the s/w reset above, we need to enable - * CRX on TX. This must be set for both full and half duplex - * operation. - */ - - ret_val = e1000_oem_read_phy_reg_ex(hw, - M88E1000_PHY_SPEC_CTRL, - &phy_data); - if(ret_val) { - DEBUGOUT("Unable to read M88E1000_PHY_SPEC_CTRL register\n"); - return ret_val; - } - - phy_data &= ~M88E1000_PSCR_ASSERT_CRS_ON_TX; - ret_val = e1000_oem_write_phy_reg_ex(hw, M88E1000_PHY_SPEC_CTRL, - phy_data); - if(ret_val) { - DEBUGOUT("Unable to write M88E1000_PHY_SPEC_CTRL register\n"); - return ret_val; - } - break; - case VSC8211_E_PHY_ID: - case VSC8601_E_PHY_ID: - case NON_PHY_PORT: - /* do nothing */ - break; - - default: - DEBUGOUT("Invalid PHY ID\n"); - return -E1000_ERR_PHY_TYPE; - } - - return E1000_SUCCESS; + uint16_t phy_data; + int32_t ret_val; + + DEBUGFUNC1("%s", __func__); + + if (!hw) { + return -1; + } + + /* + * Make note that the M88 phy is what'll be used on Truxton. + * see e1000_phy_force_speed_duplex, which does the following for M88 + */ + switch (hw->phy_id) { + case M88E1000_I_PHY_ID: + case M88E1141_E_PHY_ID: + /* + * Because we reset the PHY above, we need to re-force + * TX_CLK in the Extended PHY Specific Control Register to + * 25MHz clock. This value defaults back to a 2.5MHz clock + * when the PHY is reset. + */ + + ret_val = e1000_oem_read_phy_reg_ex(hw, + M88E1000_EXT_PHY_SPEC_CTRL, + &phy_data); + if (ret_val) { + DEBUGOUT + ("Unable to read M88E1000_EXT_SPEC_CTRL register\n"); + return ret_val; + } + + phy_data |= M88E1000_EPSCR_TX_CLK_25; + ret_val = e1000_oem_write_phy_reg_ex(hw, + M88E1000_EXT_PHY_SPEC_CTRL, + phy_data); + if (ret_val) { + DEBUGOUT("Unable to write M88E1000_EXT_PHY_SPEC_CTRL " + "register\n"); + return ret_val; + } + + /* + * In addition, because of the s/w reset above, we need to enable + * CRX on TX. This must be set for both full and half duplex + * operation. + */ + + ret_val = e1000_oem_read_phy_reg_ex(hw, + M88E1000_PHY_SPEC_CTRL, + &phy_data); + if (ret_val) { + DEBUGOUT + ("Unable to read M88E1000_PHY_SPEC_CTRL register\n"); + return ret_val; + } + + phy_data &= ~M88E1000_PSCR_ASSERT_CRS_ON_TX; + ret_val = e1000_oem_write_phy_reg_ex(hw, M88E1000_PHY_SPEC_CTRL, + phy_data); + if (ret_val) { + DEBUGOUT + ("Unable to write M88E1000_PHY_SPEC_CTRL register\n"); + return ret_val; + } + break; + case VSC8211_E_PHY_ID: + case VSC8601_E_PHY_ID: + case NON_PHY_PORT: + /* do nothing */ + break; + + default: + DEBUGOUT("Invalid PHY ID\n"); + return -E1000_ERR_PHY_TYPE; + } + + return E1000_SUCCESS; #else /* ifdef EXTERNAL_MDIO */ - return -E1000_ERR_PHY_TYPE; + return -E1000_ERR_PHY_TYPE; #endif /* ifdef EXTERNAL_MDIO */ } - /** * e1000_oem_set_phy_mode * @hw: e1000_hw struct containing device specific information @@ -763,115 +763,114 @@ e1000_oem_cleanup_after_phy_reset(struct e1000_hw *hw) * This is called from e1000_oem_setup_link which is * called from e1000_setup_link. **/ -static int32_t -e1000_oem_set_phy_mode(struct e1000_hw *hw) +static int32_t e1000_oem_set_phy_mode(struct e1000_hw *hw) { - /* - * it is unclear if it is necessary to set the phy mode. Right now only - * one MAC 82545 Rev 3 does it, but the other MACs like tola do not. - * Leave the functionality off for now until it is determined that Tolapai - * needs it as well. - */ + /* + * it is unclear if it is necessary to set the phy mode. Right now only + * one MAC 82545 Rev 3 does it, but the other MACs like tola do not. + * Leave the functionality off for now until it is determined that Tolapai + * needs it as well. + */ #ifdef skip_set_mode #undef skip_set_mode #endif #ifdef skip_set_mode - int32_t ret_val; - uint16_t eeprom_data; + int32_t ret_val; + uint16_t eeprom_data; #endif - DEBUGFUNC1("%s",__func__); - - if(!hw) { - return -1; - } - - /* - * e1000_set_phy_mode specifically works for 82545 Rev 3 only, - * since it is a 'loner' compared to the 82545, 82546, and - * 82546 Rev 3, assume for now it is anomaly and don't repeat - * for Truxton/Haxton. - * Note that this is the approach taken in both the Windows and - * FreeBSD drivers - */ - - switch (hw->phy_id) { - case VSC8211_E_PHY_ID: - { - int32_t ret_val; - int16_t phy_data; - /* Set CMODE to the RGMII-CAT5 combination */ - phy_data = - VSC8211_PHY_CTRL1_INTF_MODE1_RGMII | - VSC8211_PHY_CTRL1_TXC_SKEW_2NS | - VSC8211_PHY_CTRL1_RXC_SKEW_2NS | - VSC8211_PHY_CTRL1_RX_IDLE_CLK_ENABLE | - VSC8211_PHY_CTRL1_INTF_MODE2_CAT5; - ret_val = e1000_oem_write_phy_reg_ex(hw, VSC8211_PHY_CTRL_1, - phy_data); - if ( ret_val ) { - DEBUGOUT("Unable to write VSC8211_PHY_CTRL_1 register\n"); - return ret_val; + DEBUGFUNC1("%s", __func__); + + if (!hw) { + return -1; + } + + /* + * e1000_set_phy_mode specifically works for 82545 Rev 3 only, + * since it is a 'loner' compared to the 82545, 82546, and + * 82546 Rev 3, assume for now it is anomaly and don't repeat + * for Truxton/Haxton. + * Note that this is the approach taken in both the Windows and + * FreeBSD drivers + */ + + switch (hw->phy_id) { + case VSC8211_E_PHY_ID: + { + int32_t ret_val; + int16_t phy_data; + /* Set CMODE to the RGMII-CAT5 combination */ + phy_data = + VSC8211_PHY_CTRL1_INTF_MODE1_RGMII | + VSC8211_PHY_CTRL1_TXC_SKEW_2NS | + VSC8211_PHY_CTRL1_RXC_SKEW_2NS | + VSC8211_PHY_CTRL1_RX_IDLE_CLK_ENABLE | + VSC8211_PHY_CTRL1_INTF_MODE2_CAT5; + ret_val = + e1000_oem_write_phy_reg_ex(hw, VSC8211_PHY_CTRL_1, + phy_data); + if (ret_val) { + DEBUGOUT + ("Unable to write VSC8211_PHY_CTRL_1 register\n"); + return ret_val; } break; - } - } - + } + } #ifndef skip_set_mode - DEBUGOUT("No need to call oem_set_phy_mode on Truxton\n"); + DEBUGOUT("No need to call oem_set_phy_mode on Truxton\n"); #else - /* - * Make note that the M88 phy is what'll be used on Truxton. - * - * use e1000_set_phy_mode as example - */ - switch (hw->phy_id) { - case M88E1000_I_PHY_ID: - case M88E1141_E_PHY_ID: - ret_val = e1000_read_eeprom(hw, - EEPROM_PHY_CLASS_WORD, - 1, - &eeprom_data); - if(ret_val) { - return ret_val; - } - - if((eeprom_data != EEPROM_RESERVED_WORD) && - (eeprom_data & EEPROM_PHY_CLASS_A)) - { - ret_val = e1000_oem_write_phy_reg_ex(hw, - M88E1000_PHY_PAGE_SELECT, - 0x000B); - if(ret_val) { - DEBUGOUT("Unable to write to M88E1000_PHY_PAGE_SELECT " - "register on PHY\n"); - return ret_val; - } - - ret_val = e1000_oem_write_phy_reg_ex(hw, - M88E1000_PHY_GEN_CONTROL, - 0x8104); - if(ret_val) { - DEBUGOUT("Unable to write to M88E1000_PHY_GEN_CONTROL" - "register on PHY\n"); - return ret_val; - } - - hw->phy_reset_disable = FALSE; - } - break; - default: - DEBUGOUT("Invalid PHY ID\n"); - return -E1000_ERR_PHY_TYPE; - } + /* + * Make note that the M88 phy is what'll be used on Truxton. + * + * use e1000_set_phy_mode as example + */ + switch (hw->phy_id) { + case M88E1000_I_PHY_ID: + case M88E1141_E_PHY_ID: + ret_val = e1000_read_eeprom(hw, + EEPROM_PHY_CLASS_WORD, + 1, &eeprom_data); + if (ret_val) { + return ret_val; + } + + if ((eeprom_data != EEPROM_RESERVED_WORD) && + (eeprom_data & EEPROM_PHY_CLASS_A)) { + ret_val = e1000_oem_write_phy_reg_ex(hw, + M88E1000_PHY_PAGE_SELECT, + 0x000B); + if (ret_val) { + DEBUGOUT + ("Unable to write to M88E1000_PHY_PAGE_SELECT " + "register on PHY\n"); + return ret_val; + } + + ret_val = e1000_oem_write_phy_reg_ex(hw, + M88E1000_PHY_GEN_CONTROL, + 0x8104); + if (ret_val) { + DEBUGOUT + ("Unable to write to M88E1000_PHY_GEN_CONTROL" + "register on PHY\n"); + return ret_val; + } + + hw->phy_reset_disable = FALSE; + } + break; + default: + DEBUGOUT("Invalid PHY ID\n"); + return -E1000_ERR_PHY_TYPE; + } #endif - return E1000_SUCCESS; + return E1000_SUCCESS; } - /** * e1000_oem_detect_phy * @hw: e1000_hw struct containing device specific information @@ -882,64 +881,61 @@ e1000_oem_set_phy_mode(struct e1000_hw *hw) * * This borrows heavily from e1000_detect_gig_phy **/ -static int32_t -e1000_oem_detect_phy(struct e1000_hw *hw) +static int32_t e1000_oem_detect_phy(struct e1000_hw *hw) { - int32_t ret_val; - uint16_t phy_id_high, phy_id_low; - - DEBUGFUNC1("%s",__func__); - - if(!hw) { - return -1; - } - hw->phy_type = e1000_phy_oem; - - { - struct e1000_adapter *adapter; - uint32_t dev_num; - adapter = (struct e1000_adapter *) hw->back; - dev_num = PCI_SLOT(adapter->pdev->devfn); - switch ( dev_num ) { + int32_t ret_val; + uint16_t phy_id_high, phy_id_low; + + DEBUGFUNC1("%s", __func__); + + if (!hw) { + return -1; + } + hw->phy_type = e1000_phy_oem; + + { + struct e1000_adapter *adapter; + uint32_t dev_num; + adapter = (struct e1000_adapter *)hw->back; + dev_num = PCI_SLOT(adapter->pdev->devfn); + switch (dev_num) { #ifndef CONFIG_E1000_EP80579_PHY0 - case ICP_XXXX_MAC_0: - hw->phy_id = NON_PHY_PORT; - return E1000_SUCCESS; + case ICP_XXXX_MAC_0: + hw->phy_id = NON_PHY_PORT; + return E1000_SUCCESS; #endif #ifndef CONFIG_E1000_EP80579_PHY1 - case ICP_XXXX_MAC_1: - hw->phy_id = NON_PHY_PORT; - return E1000_SUCCESS; + case ICP_XXXX_MAC_1: + hw->phy_id = NON_PHY_PORT; + return E1000_SUCCESS; #endif #ifndef CONFIG_E1000_EP80579_PHY2 - case ICP_XXXX_MAC_2: - hw->phy_id = NON_PHY_PORT; - return E1000_SUCCESS; + case ICP_XXXX_MAC_2: + hw->phy_id = NON_PHY_PORT; + return E1000_SUCCESS; #endif - } - } - - - ret_val = e1000_oem_read_phy_reg_ex(hw, PHY_ID1, &phy_id_high); - if(ret_val) { - DEBUGOUT("Unable to read PHY register PHY_ID1\n"); - return ret_val; - } - - udelay(0x14); - ret_val = e1000_oem_read_phy_reg_ex(hw, PHY_ID2, &phy_id_low); - if(ret_val) { - DEBUGOUT("Unable to read PHY register PHY_ID2\n"); - return ret_val; - } - hw->phy_id = (uint32_t) ((phy_id_high << 0x10) + - (phy_id_low & PHY_REVISION_MASK)); - hw->phy_revision = (uint32_t) phy_id_low & ~PHY_REVISION_MASK; - - return E1000_SUCCESS; + } + } + + ret_val = e1000_oem_read_phy_reg_ex(hw, PHY_ID1, &phy_id_high); + if (ret_val) { + DEBUGOUT("Unable to read PHY register PHY_ID1\n"); + return ret_val; + } + + udelay(0x14); + ret_val = e1000_oem_read_phy_reg_ex(hw, PHY_ID2, &phy_id_low); + if (ret_val) { + DEBUGOUT("Unable to read PHY register PHY_ID2\n"); + return ret_val; + } + hw->phy_id = (uint32_t) ((phy_id_high << 0x10) + + (phy_id_low & PHY_REVISION_MASK)); + hw->phy_revision = (uint32_t) phy_id_low & ~PHY_REVISION_MASK; + + return E1000_SUCCESS; } - /** * e1000_oem_get_tipg * @hw: e1000_hw struct containing device specific information @@ -953,45 +949,43 @@ e1000_oem_detect_phy(struct e1000_hw *hw) * be required to modify the e1000_config_tx() function to accomdate the change * **/ -uint32_t -e1000_oem_get_tipg(struct e1000_hw *hw) +uint32_t e1000_oem_get_tipg(struct e1000_hw * hw) { #ifdef EXTERNAL_MDIO - uint32_t phy_num; + uint32_t phy_num; - DEBUGFUNC1("%s",__func__); + DEBUGFUNC1("%s", __func__); - if(!hw) { - return DEFAULT_ICP_XXXX_TIPG_IPGT; - } + if (!hw) { + return DEFAULT_ICP_XXXX_TIPG_IPGT; + } - switch (hw->phy_id) { - case M88E1000_I_PHY_ID: - case M88E1141_E_PHY_ID: - case VSC8211_E_PHY_ID: - case VSC8601_E_PHY_ID: - case NON_PHY_PORT: - phy_num = DEFAULT_ICP_XXXX_TIPG_IPGT; - break; - default: - DEBUGOUT("Invalid PHY ID\n"); - return DEFAULT_ICP_XXXX_TIPG_IPGT; - } + switch (hw->phy_id) { + case M88E1000_I_PHY_ID: + case M88E1141_E_PHY_ID: + case VSC8211_E_PHY_ID: + case VSC8601_E_PHY_ID: + case NON_PHY_PORT: + phy_num = DEFAULT_ICP_XXXX_TIPG_IPGT; + break; + default: + DEBUGOUT("Invalid PHY ID\n"); + return DEFAULT_ICP_XXXX_TIPG_IPGT; + } - return phy_num; + return phy_num; #else /* ifdef EXTERNAL_MDIO */ - /* return the default value required by ICP_xxxx style MACS */ - DEBUGOUT("Invalid value for transceiver type, return default" - " TIPG.IPGT value\n"); - return DEFAULT_ICP_XXXX_TIPG_IPGT; + /* return the default value required by ICP_xxxx style MACS */ + DEBUGOUT("Invalid value for transceiver type, return default" + " TIPG.IPGT value\n"); + return DEFAULT_ICP_XXXX_TIPG_IPGT; #endif /* ifdef EXTERNAL_MDIO */ } - /** * e1000_oem_phy_is_copper * @hw: e1000_hw struct containing device specific information @@ -1004,50 +998,48 @@ e1000_oem_get_tipg(struct e1000_hw *hw) * determining whether or not media type is just copper. * **/ -int -e1000_oem_phy_is_copper(struct e1000_hw *hw) +int e1000_oem_phy_is_copper(struct e1000_hw *hw) { #ifdef EXTERNAL_MDIO - int isCopper = TRUE; + int isCopper = TRUE; - DEBUGFUNC1("%s",__func__); + DEBUGFUNC1("%s", __func__); - if(!hw) { - return isCopper; - } + if (!hw) { + return isCopper; + } - switch (hw->phy_id) { - case M88E1000_I_PHY_ID: - case M88E1141_E_PHY_ID: - case VSC8211_E_PHY_ID: - case VSC8601_E_PHY_ID: - isCopper = TRUE; - break; - case NON_PHY_PORT: - isCopper = FALSE; - break; - default: - DEBUGOUT("Invalid PHY ID\n"); - return -E1000_ERR_PHY_TYPE; - } + switch (hw->phy_id) { + case M88E1000_I_PHY_ID: + case M88E1141_E_PHY_ID: + case VSC8211_E_PHY_ID: + case VSC8601_E_PHY_ID: + isCopper = TRUE; + break; + case NON_PHY_PORT: + isCopper = FALSE; + break; + default: + DEBUGOUT("Invalid PHY ID\n"); + return -E1000_ERR_PHY_TYPE; + } - return isCopper; + return isCopper; #else /* ifdef EXTERNAL_MDIO */ - /* - * caught between returning true or false. True allows it to - * be entered into && statements w/o ill effect, but false - * would make more sense - */ - DEBUGOUT("Invalid value for transceiver type, return FALSE\n"); - return FALSE; + /* + * caught between returning true or false. True allows it to + * be entered into && statements w/o ill effect, but false + * would make more sense + */ + DEBUGOUT("Invalid value for transceiver type, return FALSE\n"); + return FALSE; #endif /* ifdef EXTERNAL_MDIO */ } - /** * e1000_oem_get_phy_dev_number * @hw: e1000_hw struct containing device specific information @@ -1058,51 +1050,49 @@ e1000_oem_phy_is_copper(struct e1000_hw *hw) * in. * **/ -uint32_t -e1000_oem_get_phy_dev_number(struct e1000_hw *hw) +uint32_t e1000_oem_get_phy_dev_number(struct e1000_hw * hw) { #ifdef EXTERNAL_MDIO - /* - * for ICP_XXXX family of devices, the three network interfaces are - * differentiated by their PCI device number, where the three share - * the same PCI bus - */ - struct e1000_adapter *adapter; - uint32_t device_number; - - DEBUGFUNC1("%s",__func__); - - if(!hw) { - return 0; - } - - adapter = (struct e1000_adapter *) hw->back; - device_number = PCI_SLOT(adapter->pdev->devfn); - - switch(device_number) - { - case ICP_XXXX_MAC_0: - hw->phy_addr = 0x00; - break; - case ICP_XXXX_MAC_1: - hw->phy_addr = 0x01; - break; - case ICP_XXXX_MAC_2: - hw->phy_addr = 0x02; - break; - default: hw->phy_addr = 0x00; - } - return hw->phy_addr; + /* + * for ICP_XXXX family of devices, the three network interfaces are + * differentiated by their PCI device number, where the three share + * the same PCI bus + */ + struct e1000_adapter *adapter; + uint32_t device_number; + + DEBUGFUNC1("%s", __func__); + + if (!hw) { + return 0; + } + + adapter = (struct e1000_adapter *)hw->back; + device_number = PCI_SLOT(adapter->pdev->devfn); + + switch (device_number) { + case ICP_XXXX_MAC_0: + hw->phy_addr = 0x00; + break; + case ICP_XXXX_MAC_1: + hw->phy_addr = 0x01; + break; + case ICP_XXXX_MAC_2: + hw->phy_addr = 0x02; + break; + default: + hw->phy_addr = 0x00; + } + return hw->phy_addr; #else /* ifdef EXTERNAL_MDIO */ - DEBUGOUT("Invalid value for transceiver type, return 0\n"); - return 0; + DEBUGOUT("Invalid value for transceiver type, return 0\n"); + return 0; #endif /* ifdef EXTERNAL_MDIO */ } - /** * e1000_oem_mii_ioctl * @adapter: e1000_hw struct containing device specific information @@ -1124,73 +1114,70 @@ e1000_oem_get_phy_dev_number(struct e1000_hw *hw) **/ int e1000_oem_mii_ioctl(struct e1000_adapter *adapter, unsigned long flags, - struct ifreq *ifr, int cmd) + struct ifreq *ifr, int cmd) { #ifdef EXTERNAL_MDIO - struct mii_ioctl_data *data = if_mii(ifr); - uint16_t mii_reg = data->val_in; - uint16_t spddplx; - int retval; - - DEBUGFUNC1("%s",__func__); - - if(!adapter || !ifr) { - return -1; - } - switch (data->reg_num) { - case PHY_CTRL: - if(mii_reg & MII_CR_POWER_DOWN) { - break; - } - if(mii_reg & MII_CR_AUTO_NEG_EN) { - adapter->hw.autoneg = 1; - adapter->hw.autoneg_advertised = ICP_XXXX_AUTONEG_ADV_DEFAULT; - } - else { - if(mii_reg & 0x40) { - spddplx = SPEED_1000; - } - else if(mii_reg & 0x2000) { - spddplx = SPEED_100; - } - else { - spddplx = SPEED_10; - } - spddplx += (mii_reg & 0x100) ? FULL_DUPLEX : HALF_DUPLEX; - retval = e1000_set_spd_dplx(adapter, spddplx); - if(retval) { - return retval; - } - } - if(netif_running(adapter->netdev)) { - e1000_down(adapter); - e1000_up(adapter); - } - else { - e1000_reset(adapter); - } - break; - case M88E1000_PHY_SPEC_CTRL: - case M88E1000_EXT_PHY_SPEC_CTRL: - retval = e1000_phy_reset(&adapter->hw); - if(retval) { - DEBUGOUT("Error resetting the PHY\n"); - return -EIO; - } - break; - } - - return E1000_SUCCESS; + struct mii_ioctl_data *data = if_mii(ifr); + uint16_t mii_reg = data->val_in; + uint16_t spddplx; + int retval; + + DEBUGFUNC1("%s", __func__); + + if (!adapter || !ifr) { + return -1; + } + switch (data->reg_num) { + case PHY_CTRL: + if (mii_reg & MII_CR_POWER_DOWN) { + break; + } + if (mii_reg & MII_CR_AUTO_NEG_EN) { + adapter->hw.autoneg = 1; + adapter->hw.autoneg_advertised = + ICP_XXXX_AUTONEG_ADV_DEFAULT; + } else { + if (mii_reg & 0x40) { + spddplx = SPEED_1000; + } else if (mii_reg & 0x2000) { + spddplx = SPEED_100; + } else { + spddplx = SPEED_10; + } + spddplx += + (mii_reg & 0x100) ? FULL_DUPLEX : HALF_DUPLEX; + retval = e1000_set_spd_dplx(adapter, spddplx); + if (retval) { + return retval; + } + } + if (netif_running(adapter->netdev)) { + e1000_down(adapter); + e1000_up(adapter); + } else { + e1000_reset(adapter); + } + break; + case M88E1000_PHY_SPEC_CTRL: + case M88E1000_EXT_PHY_SPEC_CTRL: + retval = e1000_phy_reset(&adapter->hw); + if (retval) { + DEBUGOUT("Error resetting the PHY\n"); + return -EIO; + } + break; + } + + return E1000_SUCCESS; #else /* ifdef EXTERNAL_MDIO */ - return -EOPNOTSUPP; + return -EOPNOTSUPP; #endif /* ifdef EXTERNAL_MDIO */ } - /** * e1000_oem_fiber_live_in_suspend * @hw: e1000_hw struct containing device specific information @@ -1205,21 +1192,20 @@ void e1000_oem_fiber_live_in_suspend(struct e1000_hw *hw) { #ifdef EXTERNAL_MDIO - DEBUGFUNC1("%s",__func__); + DEBUGFUNC1("%s", __func__); - if(!hw) { - return; - } - return; + if (!hw) { + return; + } + return; #else /* ifdef EXTERNAL_MDIO */ - return; + return; #endif /* ifdef EXTERNAL_MDIO */ } - /** * e1000_oem_get_phy_regs * @adapter e1000_adapter struct containing device specific information @@ -1236,92 +1222,92 @@ void e1000_oem_fiber_live_in_suspend(struct e1000_hw *hw) * defintions changed, this function becomes broken. * **/ -void e1000_oem_get_phy_regs(struct e1000_adapter *adapter, uint32_t *data, - uint32_t data_len) +void e1000_oem_get_phy_regs(struct e1000_adapter *adapter, uint32_t * data, + uint32_t data_len) { #define EXPECTED_ARRAY_LEN 11 - uint32_t corrected_len; + uint32_t corrected_len; - DEBUGFUNC1("%s",__func__); + DEBUGFUNC1("%s", __func__); - if(!adapter || !data) { - return; - } + if (!adapter || !data) { + return; + } - /* This f(n) expects to have EXPECTED_ARRAY_LEN elements to initialize. - * Use the corrected_length variable to make sure we don't exceed that - * length - */ - corrected_len = data_len>EXPECTED_ARRAY_LEN - ? EXPECTED_ARRAY_LEN : data_len; - memset(data, 0, corrected_len*sizeof(uint32_t)); + /* This f(n) expects to have EXPECTED_ARRAY_LEN elements to initialize. + * Use the corrected_length variable to make sure we don't exceed that + * length + */ + corrected_len = data_len > EXPECTED_ARRAY_LEN + ? EXPECTED_ARRAY_LEN : data_len; + memset(data, 0, corrected_len * sizeof(uint32_t)); #ifdef EXTERNAL_MDIO - /* - * Fill data[] with... - * - * [0] = cable length - * [1] = cable length - * [2] = cable length - * [3] = cable length - * [4] = extended 10bt distance - * [5] = cable polarity - * [6] = cable polarity - * [7] = polarity correction enabled - * [8] = undefined - * [9] = phy receive errors - * [10] = mdix mode - */ - switch (adapter->hw.phy_id) { - case M88E1000_I_PHY_ID: - case M88E1141_E_PHY_ID: - if(corrected_len > 0) { - e1000_oem_read_phy_reg_ex(&adapter->hw, - M88E1000_PHY_SPEC_STATUS, - (uint16_t *) &data[0]); - } - if(corrected_len > 0x1){ - data[0x1] = 0x0; /* Dummy (to align w/ IGP phy reg dump) */ - } - if(corrected_len > 0x2) { - data[0x2] = 0x0; /* Dummy (to align w/ IGP phy reg dump) */ - } - if(corrected_len > 0x3) { - data[0x3] = 0x0; /* Dummy (to align w/ IGP phy reg dump) */ - } - if(corrected_len > 0x4) { - e1000_oem_read_phy_reg_ex(&adapter->hw, M88E1000_PHY_SPEC_CTRL, - (uint16_t *) &data[0x4]); - } - if(corrected_len > 0x5) { - data[0x5] = data[0x0]; - } - if(corrected_len > 0x6) { - data[0x6] = 0x0; /* Dummy (to align w/ IGP phy reg dump) */ - } - if(corrected_len > 0x7) { - data[0x7] = data[0x4]; - } - /* phy receive errors */ - if(corrected_len > 0x9) { - data[0x9] = adapter->phy_stats.receive_errors; - } - if(corrected_len > 0xa) { - data[0xa] = data[0x0]; - } - break; - default: - DEBUGOUT("Invalid PHY ID\n"); - return; - } + /* + * Fill data[] with... + * + * [0] = cable length + * [1] = cable length + * [2] = cable length + * [3] = cable length + * [4] = extended 10bt distance + * [5] = cable polarity + * [6] = cable polarity + * [7] = polarity correction enabled + * [8] = undefined + * [9] = phy receive errors + * [10] = mdix mode + */ + switch (adapter->hw.phy_id) { + case M88E1000_I_PHY_ID: + case M88E1141_E_PHY_ID: + if (corrected_len > 0) { + e1000_oem_read_phy_reg_ex(&adapter->hw, + M88E1000_PHY_SPEC_STATUS, + (uint16_t *) & data[0]); + } + if (corrected_len > 0x1) { + data[0x1] = 0x0; /* Dummy (to align w/ IGP phy reg dump) */ + } + if (corrected_len > 0x2) { + data[0x2] = 0x0; /* Dummy (to align w/ IGP phy reg dump) */ + } + if (corrected_len > 0x3) { + data[0x3] = 0x0; /* Dummy (to align w/ IGP phy reg dump) */ + } + if (corrected_len > 0x4) { + e1000_oem_read_phy_reg_ex(&adapter->hw, + M88E1000_PHY_SPEC_CTRL, + (uint16_t *) & data[0x4]); + } + if (corrected_len > 0x5) { + data[0x5] = data[0x0]; + } + if (corrected_len > 0x6) { + data[0x6] = 0x0; /* Dummy (to align w/ IGP phy reg dump) */ + } + if (corrected_len > 0x7) { + data[0x7] = data[0x4]; + } + /* phy receive errors */ + if (corrected_len > 0x9) { + data[0x9] = adapter->phy_stats.receive_errors; + } + if (corrected_len > 0xa) { + data[0xa] = data[0x0]; + } + break; + default: + DEBUGOUT("Invalid PHY ID\n"); + return; + } #endif /* ifdef EXTERNAL_MDIO */ #undef EXPECTED_ARRAY_LEN - return; + return; } - /** * e1000_oem_phy_loopback * @adapter e1000_adapter struct containing device specific information @@ -1329,117 +1315,116 @@ void e1000_oem_get_phy_regs(struct e1000_adapter *adapter, uint32_t *data, * This is called from e1000_set_phy_loopback in response from call from * ethtool to place the PHY into loopback mode. **/ -int -e1000_oem_phy_loopback(struct e1000_adapter *adapter) +int e1000_oem_phy_loopback(struct e1000_adapter *adapter) { #ifdef EXTERNAL_MDIO - int ret_val; - uint32_t ctrl_reg = 0; - - DEBUGFUNC1("%s",__func__); - - if(!adapter) { - return -1; - } - - /* - * This borrows liberally from e1000_integrated_phy_loopback(). - * e1000_nonintegrated_phy_loopback() was also a point of reference - * since it was similar. The biggest difference between the two - * was that nonintegrated called e1000_phy_reset_clk_and_crs(), - * hopefully this won't matter as CRS required for half-duplex - * operation and this is set to full duplex. - * - * Make note that the M88 phy is what'll be used on Truxton - * Loopback configuration is the same for each of the supported PHYs. - */ - switch (adapter->hw.phy_id) { - case M88E1000_I_PHY_ID: - case M88E1141_E_PHY_ID: - - adapter->hw.autoneg = FALSE; - - /* turn off Auto-MDI/MDIX */ - /*ret_val = e1000_oem_write_phy_reg_ex(&adapter->hw, - M88E1000_PHY_SPEC_CTRL, 0x0808); - if(ret_val) - { - DEBUGOUT("Unable to write to register M88E1000_PHY_SPEC_CTRL\n"); - return ret_val; - } - */ - /* reset to update Auto-MDI/MDIX */ - /* ret_val = e1000_oem_write_phy_reg_ex(&adapter->hw, - PHY_CTRL, 0x9140); - if(ret_val) - { - DEBUGOUT("Unable to write to register PHY__CTRL\n"); - return ret_val; - } - */ - /* autoneg off */ - /*ret_val = e1000_oem_write_phy_reg_ex(&adapter->hw, - PHY_CTRL, 0x8140); */ - ret_val = e1000_oem_write_phy_reg_ex(&adapter->hw, PHY_CTRL, 0xa100); - if(ret_val) { - DEBUGOUT("Unable to write to register PHY_CTRL\n"); - return ret_val; - } - - - /* force 1000, set loopback */ - /*ret_val = - e1000_oem_write_phy_reg_ex(&adapter->hw, PHY_CTRL, 0x4140); */ - ret_val = e1000_oem_write_phy_reg_ex(&adapter->hw, PHY_CTRL, 0x6100); - if(ret_val) { - DEBUGOUT("Unable to write to register PHY_CTRL\n"); - return ret_val; - } - - ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL); - ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */ - ctrl_reg |= (E1000_CTRL_FRCSPD /* Set the Force Speed Bit */ - | E1000_CTRL_FRCDPX /* Set the Force Duplex Bit */ - | E1000_CTRL_SPD_100 /* Force Speed to 1000 */ - | E1000_CTRL_FD); /* Force Duplex to FULL */ - /* | E1000_CTRL_ILOS); */ /* Invert Loss of Signal */ - - E1000_WRITE_REG(&adapter->hw, CTRL, ctrl_reg); - - /* - * Write out to PHY registers 29 and 30 to disable the Receiver. - * This directly lifted from e1000_phy_disable_receiver(). - * - * The code is currently commented out as for the M88 used in - * Truxton, registers 29 and 30 are unutilized. Leave in, just - * in case we are on the receiving end of an 'undocumented' - * feature - */ - /* - * e1000_oem_write_phy_reg_ex(&adapter->hw, 29, 0x001F); - * e1000_oem_write_phy_reg_ex(&adapter->hw, 30, 0x8FFC); - * e1000_oem_write_phy_reg_ex(&adapter->hw, 29, 0x001A); - * e1000_oem_write_phy_reg_ex(&adapter->hw, 30, 0x8FF0); - */ - - break; - default: - DEBUGOUT("Invalid PHY ID\n"); - return -E1000_ERR_PHY_TYPE; - } - - return 0; + int ret_val; + uint32_t ctrl_reg = 0; + + DEBUGFUNC1("%s", __func__); + + if (!adapter) { + return -1; + } + + /* + * This borrows liberally from e1000_integrated_phy_loopback(). + * e1000_nonintegrated_phy_loopback() was also a point of reference + * since it was similar. The biggest difference between the two + * was that nonintegrated called e1000_phy_reset_clk_and_crs(), + * hopefully this won't matter as CRS required for half-duplex + * operation and this is set to full duplex. + * + * Make note that the M88 phy is what'll be used on Truxton + * Loopback configuration is the same for each of the supported PHYs. + */ + switch (adapter->hw.phy_id) { + case M88E1000_I_PHY_ID: + case M88E1141_E_PHY_ID: + + adapter->hw.autoneg = FALSE; + + /* turn off Auto-MDI/MDIX */ + /*ret_val = e1000_oem_write_phy_reg_ex(&adapter->hw, + M88E1000_PHY_SPEC_CTRL, 0x0808); + if(ret_val) + { + DEBUGOUT("Unable to write to register M88E1000_PHY_SPEC_CTRL\n"); + return ret_val; + } + */ + /* reset to update Auto-MDI/MDIX */ + /* ret_val = e1000_oem_write_phy_reg_ex(&adapter->hw, + PHY_CTRL, 0x9140); + if(ret_val) + { + DEBUGOUT("Unable to write to register PHY__CTRL\n"); + return ret_val; + } + */ + /* autoneg off */ + /*ret_val = e1000_oem_write_phy_reg_ex(&adapter->hw, + PHY_CTRL, 0x8140); */ + ret_val = + e1000_oem_write_phy_reg_ex(&adapter->hw, PHY_CTRL, 0xa100); + if (ret_val) { + DEBUGOUT("Unable to write to register PHY_CTRL\n"); + return ret_val; + } + + /* force 1000, set loopback */ + /*ret_val = + e1000_oem_write_phy_reg_ex(&adapter->hw, PHY_CTRL, 0x4140); */ + ret_val = + e1000_oem_write_phy_reg_ex(&adapter->hw, PHY_CTRL, 0x6100); + if (ret_val) { + DEBUGOUT("Unable to write to register PHY_CTRL\n"); + return ret_val; + } + + ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL); + ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */ + ctrl_reg |= (E1000_CTRL_FRCSPD /* Set the Force Speed Bit */ + | E1000_CTRL_FRCDPX /* Set the Force Duplex Bit */ + | E1000_CTRL_SPD_100 /* Force Speed to 1000 */ + | E1000_CTRL_FD); /* Force Duplex to FULL */ + /* | E1000_CTRL_ILOS); *//* Invert Loss of Signal */ + + E1000_WRITE_REG(&adapter->hw, CTRL, ctrl_reg); + + /* + * Write out to PHY registers 29 and 30 to disable the Receiver. + * This directly lifted from e1000_phy_disable_receiver(). + * + * The code is currently commented out as for the M88 used in + * Truxton, registers 29 and 30 are unutilized. Leave in, just + * in case we are on the receiving end of an 'undocumented' + * feature + */ + /* + * e1000_oem_write_phy_reg_ex(&adapter->hw, 29, 0x001F); + * e1000_oem_write_phy_reg_ex(&adapter->hw, 30, 0x8FFC); + * e1000_oem_write_phy_reg_ex(&adapter->hw, 29, 0x001A); + * e1000_oem_write_phy_reg_ex(&adapter->hw, 30, 0x8FF0); + */ + + break; + default: + DEBUGOUT("Invalid PHY ID\n"); + return -E1000_ERR_PHY_TYPE; + } + + return 0; #else /* ifdef EXTERNAL_MDIO */ - return -E1000_ERR_PHY_TYPE; + return -E1000_ERR_PHY_TYPE; #endif /* ifdef EXTERNAL_MDIO */ } - /** * e1000_oem_loopback_cleanup * @adapter e1000_adapter struct containing device specific information @@ -1448,59 +1433,59 @@ e1000_oem_phy_loopback(struct e1000_adapter *adapter) * ethtool to place the PHY out of loopback mode. This handles the OEM * specific part of loopback cleanup. **/ -void -e1000_oem_loopback_cleanup(struct e1000_adapter *adapter) +void e1000_oem_loopback_cleanup(struct e1000_adapter *adapter) { #ifdef EXTERNAL_MDIO - /* - * This borrows liberally from e1000_loopback_cleanup(). - * making note that the M88 phy is what'll be used on Truxton - * - * Loopback cleanup is the same for all supported PHYs. - */ - int32_t ret_val; - uint16_t phy_reg; - - DEBUGFUNC1("%s",__func__); - - if(!adapter) { - return ; - } - - switch (adapter->hw.phy_id) { - case M88E1000_I_PHY_ID: - case M88E1141_E_PHY_ID: - default: - adapter->hw.autoneg = TRUE; - - ret_val = e1000_oem_read_phy_reg_ex(&adapter->hw, PHY_CTRL, - &phy_reg); - if(ret_val) { - DEBUGOUT("Unable to read to register PHY_CTRL\n"); - return; - } - - if(phy_reg & MII_CR_LOOPBACK) { - phy_reg &= ~MII_CR_LOOPBACK; - - ret_val = e1000_oem_write_phy_reg_ex(&adapter->hw, PHY_CTRL, - phy_reg); - if(ret_val) { - DEBUGOUT("Unable to write to register PHY_CTRL\n"); - return; - } - - e1000_phy_reset(&adapter->hw); - } - } + /* + * This borrows liberally from e1000_loopback_cleanup(). + * making note that the M88 phy is what'll be used on Truxton + * + * Loopback cleanup is the same for all supported PHYs. + */ + int32_t ret_val; + uint16_t phy_reg; + + DEBUGFUNC1("%s", __func__); + + if (!adapter) { + return; + } + + switch (adapter->hw.phy_id) { + case M88E1000_I_PHY_ID: + case M88E1141_E_PHY_ID: + default: + adapter->hw.autoneg = TRUE; + + ret_val = e1000_oem_read_phy_reg_ex(&adapter->hw, PHY_CTRL, + &phy_reg); + if (ret_val) { + DEBUGOUT("Unable to read to register PHY_CTRL\n"); + return; + } + + if (phy_reg & MII_CR_LOOPBACK) { + phy_reg &= ~MII_CR_LOOPBACK; + + ret_val = + e1000_oem_write_phy_reg_ex(&adapter->hw, PHY_CTRL, + phy_reg); + if (ret_val) { + DEBUGOUT + ("Unable to write to register PHY_CTRL\n"); + return; + } + + e1000_phy_reset(&adapter->hw); + } + } #endif /* ifdef EXTERNAL_MDIO */ - return; + return; } - /** * e1000_oem_phy_speed_downgraded * @hw e1000_hw struct containing device specific information @@ -1511,82 +1496,84 @@ e1000_oem_loopback_cleanup(struct e1000_adapter *adapter) * at as speed slower than its maximum. **/ uint32_t -e1000_oem_phy_speed_downgraded(struct e1000_hw *hw, uint16_t *isDowngraded) +e1000_oem_phy_speed_downgraded(struct e1000_hw * hw, uint16_t * isDowngraded) { #ifdef EXTERNAL_MDIO - uint32_t ret_val; - uint16_t phy_data; - - DEBUGFUNC1("%s",__func__); - - if(!hw || !isDowngraded) { - return 1; - } - - /* - * borrow liberally from E1000_check_downshift e1000_phy_m88 case. - * Make note that the M88 phy is what'll be used on Truxton - */ - - switch (hw->phy_id) { - case M88E1000_I_PHY_ID: - case M88E1141_E_PHY_ID: - ret_val = e1000_oem_read_phy_reg_ex(hw, M88E1000_PHY_SPEC_STATUS, - &phy_data); - if(ret_val) { - DEBUGOUT("Unable to read register M88E1000_PHY_SPEC_STATUS\n"); - return ret_val; - } - - *isDowngraded = (phy_data & M88E1000_PSSR_DOWNSHIFT) - >> M88E1000_PSSR_DOWNSHIFT_SHIFT; - - break; - - case VSC8211_E_PHY_ID: - ret_val = e1000_oem_read_phy_reg_ex(hw, VSC8211_AUX_CTRL_STS, - &phy_data); - if ( ret_val ) { - DEBUGOUT("Unable to read register VSC8211_AUX_CTRL_STS\n"); - return ret_val; - } - *isDowngraded = (phy_data & VSC8211_AUX_SPEED_MASK) != - VSC8211_AUX_SPEED_IS_1000; - break; - - case VSC8601_E_PHY_ID: - ret_val = e1000_oem_read_phy_reg_ex(hw, VSC8601_AUX_CTRL_STS, - &phy_data); - if ( ret_val ) { - DEBUGOUT("Unable to read register VSC8601_AUX_CTRL_STS\n"); - return ret_val; - } - *isDowngraded = (phy_data & VSC8601_AUX_SPEED_MASK) != - VSC8601_AUX_SPEED_IS_1000; - break; - - - default: - DEBUGOUT("Invalid PHY ID\n"); - return 1; - } - - return 0; + uint32_t ret_val; + uint16_t phy_data; + + DEBUGFUNC1("%s", __func__); + + if (!hw || !isDowngraded) { + return 1; + } + + /* + * borrow liberally from E1000_check_downshift e1000_phy_m88 case. + * Make note that the M88 phy is what'll be used on Truxton + */ + + switch (hw->phy_id) { + case M88E1000_I_PHY_ID: + case M88E1141_E_PHY_ID: + ret_val = + e1000_oem_read_phy_reg_ex(hw, M88E1000_PHY_SPEC_STATUS, + &phy_data); + if (ret_val) { + DEBUGOUT + ("Unable to read register M88E1000_PHY_SPEC_STATUS\n"); + return ret_val; + } + + *isDowngraded = (phy_data & M88E1000_PSSR_DOWNSHIFT) + >> M88E1000_PSSR_DOWNSHIFT_SHIFT; + + break; + + case VSC8211_E_PHY_ID: + ret_val = e1000_oem_read_phy_reg_ex(hw, VSC8211_AUX_CTRL_STS, + &phy_data); + if (ret_val) { + DEBUGOUT + ("Unable to read register VSC8211_AUX_CTRL_STS\n"); + return ret_val; + } + *isDowngraded = (phy_data & VSC8211_AUX_SPEED_MASK) != + VSC8211_AUX_SPEED_IS_1000; + break; + + case VSC8601_E_PHY_ID: + ret_val = e1000_oem_read_phy_reg_ex(hw, VSC8601_AUX_CTRL_STS, + &phy_data); + if (ret_val) { + DEBUGOUT + ("Unable to read register VSC8601_AUX_CTRL_STS\n"); + return ret_val; + } + *isDowngraded = (phy_data & VSC8601_AUX_SPEED_MASK) != + VSC8601_AUX_SPEED_IS_1000; + break; + + default: + DEBUGOUT("Invalid PHY ID\n"); + return 1; + } + + return 0; #else /* ifdef EXTERNAL_MDIO */ - if(!hw || !isDowngraded) { - return 1; - } + if (!hw || !isDowngraded) { + return 1; + } - *isDowngraded = 0; - return 0; + *isDowngraded = 0; + return 0; #endif /* ifdef EXTERNAL_MDIO */ } - /** * e1000_oem_check_polarity * @hw e1000_hw struct containing device specific information @@ -1596,64 +1583,63 @@ e1000_oem_phy_speed_downgraded(struct e1000_hw *hw, uint16_t *isDowngraded) * Called by e1000_check_downshift(), checks the PHY to see if it running * at as speed slower than its maximum. **/ -int32_t -e1000_oem_check_polarity(struct e1000_hw *hw, uint16_t *polarity) +int32_t e1000_oem_check_polarity(struct e1000_hw * hw, uint16_t * polarity) { #ifdef EXTERNAL_MDIO - int32_t ret_val; - uint16_t phy_data; - - DEBUGFUNC1("%s",__func__); - - if(!hw || !polarity) { - return -1; - } - - /* - * borrow liberally from e1000_check_polarity. - * Make note that the M88 phy is what'll be used on Truxton - */ - - switch (hw->phy_id) { - case M88E1000_I_PHY_ID: - case M88E1141_E_PHY_ID: - /* return the Polarity bit in the Status register. */ - ret_val = e1000_oem_read_phy_reg_ex(hw, - M88E1000_PHY_SPEC_STATUS, - &phy_data); - if(ret_val) { - DEBUGOUT("Unable to read register M88E1000_PHY_SPEC_STATUS\n"); - return ret_val; - } - - *polarity = (phy_data & M88E1000_PSSR_REV_POLARITY) - >> M88E1000_PSSR_REV_POLARITY_SHIFT; - - break; - case VSC8211_E_PHY_ID: - case VSC8601_E_PHY_ID: - DEBUGOUT("check polarity is not supported by VSC8XXX\n"); - return -E1000_ERR_PHY_TYPE; - default: - DEBUGOUT("Invalid PHY ID\n"); - return -E1000_ERR_PHY_TYPE; - } - return 0; + int32_t ret_val; + uint16_t phy_data; + + DEBUGFUNC1("%s", __func__); + + if (!hw || !polarity) { + return -1; + } + + /* + * borrow liberally from e1000_check_polarity. + * Make note that the M88 phy is what'll be used on Truxton + */ + + switch (hw->phy_id) { + case M88E1000_I_PHY_ID: + case M88E1141_E_PHY_ID: + /* return the Polarity bit in the Status register. */ + ret_val = e1000_oem_read_phy_reg_ex(hw, + M88E1000_PHY_SPEC_STATUS, + &phy_data); + if (ret_val) { + DEBUGOUT + ("Unable to read register M88E1000_PHY_SPEC_STATUS\n"); + return ret_val; + } + + *polarity = (phy_data & M88E1000_PSSR_REV_POLARITY) + >> M88E1000_PSSR_REV_POLARITY_SHIFT; + + break; + case VSC8211_E_PHY_ID: + case VSC8601_E_PHY_ID: + DEBUGOUT("check polarity is not supported by VSC8XXX\n"); + return -E1000_ERR_PHY_TYPE; + default: + DEBUGOUT("Invalid PHY ID\n"); + return -E1000_ERR_PHY_TYPE; + } + return 0; #else /* ifdef EXTERNAL_MDIO */ - if(!hw || !polarity) { - return -1; - } + if (!hw || !polarity) { + return -1; + } - *polarity = 0; - return -1; + *polarity = 0; + return -1; #endif /* ifdef EXTERNAL_MDIO */ } - /** * e1000_oem_phy_is_full_duplex * @hw e1000_hw struct containing device specific information @@ -1663,73 +1649,85 @@ e1000_oem_check_polarity(struct e1000_hw *hw, uint16_t *polarity) * the MAC with the PHY. It turns out on ICP_XXXX, this is not * done automagically. **/ -int32_t -e1000_oem_phy_is_full_duplex(struct e1000_hw *hw, int *isFD) +int32_t e1000_oem_phy_is_full_duplex(struct e1000_hw * hw, int *isFD) { #ifdef EXTERNAL_MDIO - uint16_t phy_data; - int32_t ret_val; - - DEBUGFUNC1("%s",__func__); - - if(!hw || !isFD) { - return -1; - } - /* - * Make note that the M88 phy is what'll be used on Truxton - * see e1000_config_mac_to_phy - */ - - switch (hw->phy_id) { - case M88E1000_I_PHY_ID: - case M88E1141_E_PHY_ID: - ret_val = e1000_oem_read_phy_reg_ex(hw, M88E1000_PHY_SPEC_STATUS, - &phy_data); - if(ret_val) { - DEBUGOUT("Unable to read register M88E1000_PHY_SPEC_STATUS\n"); - return ret_val; - } - *isFD = (phy_data & M88E1000_PSSR_DPLX) != 0; - - break; - case VSC8211_E_PHY_ID: - ret_val = e1000_oem_read_phy_reg_ex(hw, VSC8211_AUX_CTRL_STS, &phy_data); - if ( ret_val ) { - DEBUGOUT("Unable to read register VSC8211_AUX_CTRL_STS\n"); - return ret_val; - } - *isFD = (phy_data & VSC8211_AUX_FDX_MASK)==VSC8211_AUX_FDX_IS_FULL; - break; - case VSC8601_E_PHY_ID: - ret_val = e1000_oem_read_phy_reg_ex(hw, VSC8601_AUX_CTRL_STS, &phy_data); - if ( ret_val ) { - DEBUGOUT("Unable to read register VSC8601_AUX_CTRL_STS\n"); - return ret_val; - } - *isFD = (phy_data & VSC8601_AUX_FDX_MASK)==VSC8601_AUX_FDX_IS_FULL; - break; - - case NON_PHY_PORT: - *isFD = TRUE; - break; - default: - DEBUGOUT("Invalid PHY ID\n"); - return -E1000_ERR_PHY_TYPE; - } - - return E1000_SUCCESS; + uint16_t phy_data; + int32_t ret_val; + + DEBUGFUNC1("%s", __func__); + + if (!hw || !isFD) { + return -1; + } + /* + * Make note that the M88 phy is what'll be used on Truxton + * see e1000_config_mac_to_phy + */ + + switch (hw->phy_id) { + case M88E1000_I_PHY_ID: + case M88E1141_E_PHY_ID: + ret_val = + e1000_oem_read_phy_reg_ex(hw, M88E1000_PHY_SPEC_STATUS, + &phy_data); + if (ret_val) { + DEBUGOUT + ("Unable to read register M88E1000_PHY_SPEC_STATUS\n"); + return ret_val; + } + *isFD = (phy_data & M88E1000_PSSR_DPLX) != 0; + + break; + case VSC8211_E_PHY_ID: + ret_val = + e1000_oem_read_phy_reg_ex(hw, VSC8211_AUX_CTRL_STS, + &phy_data); + if (ret_val) { + DEBUGOUT + ("Unable to read register VSC8211_AUX_CTRL_STS\n"); + return ret_val; + } + *isFD = + (phy_data & VSC8211_AUX_FDX_MASK) == + VSC8211_AUX_FDX_IS_FULL; + break; + case VSC8601_E_PHY_ID: + ret_val = + e1000_oem_read_phy_reg_ex(hw, VSC8601_AUX_CTRL_STS, + &phy_data); + if (ret_val) { + DEBUGOUT + ("Unable to read register VSC8601_AUX_CTRL_STS\n"); + return ret_val; + } + *isFD = + (phy_data & VSC8601_AUX_FDX_MASK) == + VSC8601_AUX_FDX_IS_FULL; + break; + + case NON_PHY_PORT: + *isFD = TRUE; + break; + default: + DEBUGOUT("Invalid PHY ID\n"); + return -E1000_ERR_PHY_TYPE; + } + + return E1000_SUCCESS; #else /* ifdef EXTERNAL_MDIO */ - if(!hw || !isFD) { - return -1; - } - *isFD = FALSE; - return -E1000_ERR_PHY_TYPE; + if (!hw || !isFD) { + return -1; + } + *isFD = FALSE; + return -E1000_ERR_PHY_TYPE; #endif /* ifdef EXTERNAL_MDIO */ } + /** * e1000_oem_phy_is_speed_1000 * @hw e1000_hw struct containing device specific information @@ -1739,71 +1737,79 @@ e1000_oem_phy_is_full_duplex(struct e1000_hw *hw, int *isFD) * the MAC with the PHY. It turns out on ICP_XXXX, this is not * done automagically. **/ -int32_t -e1000_oem_phy_is_speed_1000(struct e1000_hw *hw, int *is1000) +int32_t e1000_oem_phy_is_speed_1000(struct e1000_hw * hw, int *is1000) { #ifdef EXTERNAL_MDIO - uint16_t phy_data; - int32_t ret_val; - - DEBUGFUNC1("%s",__func__); - - if(!hw || !is1000) { - return -1; - } - /* - * Make note that the M88 phy is what'll be used on Truxton. - * see e1000_config_mac_to_phy - */ - - switch (hw->phy_id) { - case M88E1000_I_PHY_ID: - case M88E1141_E_PHY_ID: - ret_val = e1000_oem_read_phy_reg_ex(hw, M88E1000_PHY_SPEC_STATUS, - &phy_data); - if(ret_val) { - DEBUGOUT("Unable to read register M88E1000_PHY_SPEC_STATUS\n"); - return ret_val; - } - *is1000 = (phy_data & M88E1000_PSSR_SPEED) == M88E1000_PSSR_1000MBS; - break; - case VSC8211_E_PHY_ID: - ret_val = e1000_oem_read_phy_reg_ex(hw, VSC8211_AUX_CTRL_STS, &phy_data); - if ( ret_val ) { - DEBUGOUT("Unable to read register VSC8211_AUX_CTRL_STS\n"); - return ret_val; - } - *is1000 = (phy_data & VSC8211_AUX_SPEED_MASK) == - VSC8211_AUX_SPEED_IS_1000; - break; - case VSC8601_E_PHY_ID: - ret_val = e1000_oem_read_phy_reg_ex(hw, VSC8601_AUX_CTRL_STS, &phy_data); - if ( ret_val ) { - DEBUGOUT("Unable to read register VSC8601_AUX_CTRL_STS\n"); - return ret_val; - } - *is1000 = (phy_data & VSC8601_AUX_SPEED_MASK) == - VSC8601_AUX_SPEED_IS_1000; - break; - - case NON_PHY_PORT: - *is1000 = TRUE; - break; - default: - DEBUGOUT("Invalid PHY ID\n"); - return -E1000_ERR_PHY_TYPE; - } - - return E1000_SUCCESS; + uint16_t phy_data; + int32_t ret_val; + + DEBUGFUNC1("%s", __func__); + + if (!hw || !is1000) { + return -1; + } + /* + * Make note that the M88 phy is what'll be used on Truxton. + * see e1000_config_mac_to_phy + */ + + switch (hw->phy_id) { + case M88E1000_I_PHY_ID: + case M88E1141_E_PHY_ID: + ret_val = + e1000_oem_read_phy_reg_ex(hw, M88E1000_PHY_SPEC_STATUS, + &phy_data); + if (ret_val) { + DEBUGOUT + ("Unable to read register M88E1000_PHY_SPEC_STATUS\n"); + return ret_val; + } + *is1000 = + (phy_data & M88E1000_PSSR_SPEED) == M88E1000_PSSR_1000MBS; + break; + case VSC8211_E_PHY_ID: + ret_val = + e1000_oem_read_phy_reg_ex(hw, VSC8211_AUX_CTRL_STS, + &phy_data); + if (ret_val) { + DEBUGOUT + ("Unable to read register VSC8211_AUX_CTRL_STS\n"); + return ret_val; + } + *is1000 = (phy_data & VSC8211_AUX_SPEED_MASK) == + VSC8211_AUX_SPEED_IS_1000; + break; + case VSC8601_E_PHY_ID: + ret_val = + e1000_oem_read_phy_reg_ex(hw, VSC8601_AUX_CTRL_STS, + &phy_data); + if (ret_val) { + DEBUGOUT + ("Unable to read register VSC8601_AUX_CTRL_STS\n"); + return ret_val; + } + *is1000 = (phy_data & VSC8601_AUX_SPEED_MASK) == + VSC8601_AUX_SPEED_IS_1000; + break; + + case NON_PHY_PORT: + *is1000 = TRUE; + break; + default: + DEBUGOUT("Invalid PHY ID\n"); + return -E1000_ERR_PHY_TYPE; + } + + return E1000_SUCCESS; #else /* ifdef EXTERNAL_MDIO */ - if(!hw || !is1000) { - return -1; - } - *is1000 = FALSE; - return -E1000_ERR_PHY_TYPE; + if (!hw || !is1000) { + return -1; + } + *is1000 = FALSE; + return -E1000_ERR_PHY_TYPE; #endif /* ifdef EXTERNAL_MDIO */ } @@ -1817,70 +1823,77 @@ e1000_oem_phy_is_speed_1000(struct e1000_hw *hw, int *is1000) * the MAC with the PHY. It turns out on ICP_XXXX, this is not * done automagically. **/ -int32_t -e1000_oem_phy_is_speed_100(struct e1000_hw *hw, int *is100) +int32_t e1000_oem_phy_is_speed_100(struct e1000_hw * hw, int *is100) { #ifdef EXTERNAL_MDIO - uint16_t phy_data; - int32_t ret_val; - - DEBUGFUNC1("%s",__func__); - - if(!hw || !is100) { - return -1; - } - /* - * Make note that the M88 phy is what'll be used on Truxton - * see e1000_config_mac_to_phy - */ - switch (hw->phy_id) { - case M88E1000_I_PHY_ID: - case M88E1141_E_PHY_ID: - ret_val = e1000_oem_read_phy_reg_ex(hw, - M88E1000_PHY_SPEC_STATUS, - &phy_data); - if(ret_val) { - DEBUGOUT("Unable to read register M88E1000_PHY_SPEC_STATUS\n"); - return ret_val; - } - *is100 = (phy_data & M88E1000_PSSR_SPEED) == M88E1000_PSSR_100MBS; - break; - case VSC8211_E_PHY_ID: - ret_val = e1000_oem_read_phy_reg_ex(hw, VSC8211_AUX_CTRL_STS, &phy_data); - if ( ret_val ) { - DEBUGOUT("Unable to read register VSC8211_AUX_CTRL_STS\n"); - return ret_val; - } - *is100 = (phy_data & VSC8211_AUX_SPEED_MASK) == - VSC8211_AUX_SPEED_IS_100; - break; - case VSC8601_E_PHY_ID: - ret_val = e1000_oem_read_phy_reg_ex(hw, VSC8601_AUX_CTRL_STS, &phy_data); - if ( ret_val ) { - DEBUGOUT("Unable to read register VSC8601_AUX_CTRL_STS\n"); - return ret_val; - } - *is100 = (phy_data & VSC8601_AUX_SPEED_MASK) == - VSC8601_AUX_SPEED_IS_100; - break; - case NON_PHY_PORT: - *is100 = FALSE; - break; - default: - DEBUGOUT("Invalid PHY ID\n"); - return -E1000_ERR_PHY_TYPE; - } - - return E1000_SUCCESS; + uint16_t phy_data; + int32_t ret_val; + + DEBUGFUNC1("%s", __func__); + + if (!hw || !is100) { + return -1; + } + /* + * Make note that the M88 phy is what'll be used on Truxton + * see e1000_config_mac_to_phy + */ + switch (hw->phy_id) { + case M88E1000_I_PHY_ID: + case M88E1141_E_PHY_ID: + ret_val = e1000_oem_read_phy_reg_ex(hw, + M88E1000_PHY_SPEC_STATUS, + &phy_data); + if (ret_val) { + DEBUGOUT + ("Unable to read register M88E1000_PHY_SPEC_STATUS\n"); + return ret_val; + } + *is100 = + (phy_data & M88E1000_PSSR_SPEED) == M88E1000_PSSR_100MBS; + break; + case VSC8211_E_PHY_ID: + ret_val = + e1000_oem_read_phy_reg_ex(hw, VSC8211_AUX_CTRL_STS, + &phy_data); + if (ret_val) { + DEBUGOUT + ("Unable to read register VSC8211_AUX_CTRL_STS\n"); + return ret_val; + } + *is100 = (phy_data & VSC8211_AUX_SPEED_MASK) == + VSC8211_AUX_SPEED_IS_100; + break; + case VSC8601_E_PHY_ID: + ret_val = + e1000_oem_read_phy_reg_ex(hw, VSC8601_AUX_CTRL_STS, + &phy_data); + if (ret_val) { + DEBUGOUT + ("Unable to read register VSC8601_AUX_CTRL_STS\n"); + return ret_val; + } + *is100 = (phy_data & VSC8601_AUX_SPEED_MASK) == + VSC8601_AUX_SPEED_IS_100; + break; + case NON_PHY_PORT: + *is100 = FALSE; + break; + default: + DEBUGOUT("Invalid PHY ID\n"); + return -E1000_ERR_PHY_TYPE; + } + + return E1000_SUCCESS; #else /* ifdef EXTERNAL_MDIO */ - if(!hw || !is100) { - return -1; - } - *is100 = FALSE; - return -E1000_ERR_PHY_TYPE; + if (!hw || !is100) { + return -1; + } + *is100 = FALSE; + return -E1000_ERR_PHY_TYPE; #endif /* ifdef EXTERNAL_MDIO */ } @@ -1894,96 +1907,102 @@ e1000_oem_phy_is_speed_100(struct e1000_hw *hw, int *is100) * data. This is called for copper media based phys. **/ int32_t -e1000_oem_phy_get_info(struct e1000_hw *hw, - struct e1000_phy_info *phy_info) +e1000_oem_phy_get_info(struct e1000_hw * hw, struct e1000_phy_info * phy_info) { #ifdef EXTERNAL_MDIO - int32_t ret_val; - uint16_t phy_data, polarity; - - DEBUGFUNC1("%s",__func__); - - if(!hw || !phy_info) { - return -1; - } - - /* - * Make note that the M88 phy is what'll be used on Truxton - * see e1000_phy_m88_get_info - */ - switch (hw->phy_id) { - case M88E1000_I_PHY_ID: - case M88E1141_E_PHY_ID: - /* The downshift status is checked only once, after link is - * established and it stored in the hw->speed_downgraded parameter.*/ - phy_info->downshift = (e1000_downshift)hw->speed_downgraded; - - ret_val = e1000_oem_read_phy_reg_ex(hw, M88E1000_PHY_SPEC_CTRL, - &phy_data); - if(ret_val) { - DEBUGOUT("Unable to read register M88E1000_PHY_SPEC_CTRL\n"); - return ret_val; - } - - phy_info->extended_10bt_distance = - (phy_data & M88E1000_PSCR_10BT_EXT_DIST_ENABLE) - >> M88E1000_PSCR_10BT_EXT_DIST_ENABLE_SHIFT; - phy_info->polarity_correction = - (phy_data & M88E1000_PSCR_POLARITY_REVERSAL) - >> M88E1000_PSCR_POLARITY_REVERSAL_SHIFT; - - /* Check polarity status */ - ret_val = e1000_oem_check_polarity(hw, &polarity); - if(ret_val) { - return ret_val; - } - - phy_info->cable_polarity = polarity; - - ret_val = e1000_oem_read_phy_reg_ex(hw, M88E1000_PHY_SPEC_STATUS, - &phy_data); - if(ret_val) { - DEBUGOUT("Unable to read register M88E1000_PHY_SPEC_STATUS\n"); - return ret_val; - } - - phy_info->mdix_mode = (phy_data & M88E1000_PSSR_MDIX) - >> M88E1000_PSSR_MDIX_SHIFT; - - if ((phy_data & M88E1000_PSSR_SPEED) == M88E1000_PSSR_1000MBS) { - /* Cable Length Estimation and Local/Remote Receiver Information - * are only valid at 1000 Mbps. - */ - phy_info->cable_length = - (phy_data & M88E1000_PSSR_CABLE_LENGTH) - >> M88E1000_PSSR_CABLE_LENGTH_SHIFT; - - ret_val = e1000_oem_read_phy_reg_ex(hw, PHY_1000T_STATUS, - &phy_data); - if(ret_val) { - DEBUGOUT("Unable to read register PHY_1000T_STATUS\n"); - return ret_val; - } - - phy_info->local_rx = (phy_data & SR_1000T_LOCAL_RX_STATUS) - >> SR_1000T_LOCAL_RX_STATUS_SHIFT; - - phy_info->remote_rx = (phy_data & SR_1000T_REMOTE_RX_STATUS) - >> SR_1000T_REMOTE_RX_STATUS_SHIFT; - } - - break; - default: - DEBUGOUT("Invalid PHY ID\n"); - return -E1000_ERR_PHY_TYPE; - } - - return E1000_SUCCESS; + int32_t ret_val; + uint16_t phy_data, polarity; + + DEBUGFUNC1("%s", __func__); + + if (!hw || !phy_info) { + return -1; + } + + /* + * Make note that the M88 phy is what'll be used on Truxton + * see e1000_phy_m88_get_info + */ + switch (hw->phy_id) { + case M88E1000_I_PHY_ID: + case M88E1141_E_PHY_ID: + /* The downshift status is checked only once, after link is + * established and it stored in the hw->speed_downgraded parameter.*/ + phy_info->downshift = (e1000_downshift) hw->speed_downgraded; + + ret_val = e1000_oem_read_phy_reg_ex(hw, M88E1000_PHY_SPEC_CTRL, + &phy_data); + if (ret_val) { + DEBUGOUT + ("Unable to read register M88E1000_PHY_SPEC_CTRL\n"); + return ret_val; + } + + phy_info->extended_10bt_distance = + (phy_data & M88E1000_PSCR_10BT_EXT_DIST_ENABLE) + >> M88E1000_PSCR_10BT_EXT_DIST_ENABLE_SHIFT; + phy_info->polarity_correction = + (phy_data & M88E1000_PSCR_POLARITY_REVERSAL) + >> M88E1000_PSCR_POLARITY_REVERSAL_SHIFT; + + /* Check polarity status */ + ret_val = e1000_oem_check_polarity(hw, &polarity); + if (ret_val) { + return ret_val; + } + + phy_info->cable_polarity = polarity; + + ret_val = + e1000_oem_read_phy_reg_ex(hw, M88E1000_PHY_SPEC_STATUS, + &phy_data); + if (ret_val) { + DEBUGOUT + ("Unable to read register M88E1000_PHY_SPEC_STATUS\n"); + return ret_val; + } + + phy_info->mdix_mode = (phy_data & M88E1000_PSSR_MDIX) + >> M88E1000_PSSR_MDIX_SHIFT; + + if ((phy_data & M88E1000_PSSR_SPEED) == M88E1000_PSSR_1000MBS) { + /* Cable Length Estimation and Local/Remote Receiver Information + * are only valid at 1000 Mbps. + */ + phy_info->cable_length = + (phy_data & M88E1000_PSSR_CABLE_LENGTH) + >> M88E1000_PSSR_CABLE_LENGTH_SHIFT; + + ret_val = + e1000_oem_read_phy_reg_ex(hw, PHY_1000T_STATUS, + &phy_data); + if (ret_val) { + DEBUGOUT + ("Unable to read register PHY_1000T_STATUS\n"); + return ret_val; + } + + phy_info->local_rx = + (phy_data & SR_1000T_LOCAL_RX_STATUS) + >> SR_1000T_LOCAL_RX_STATUS_SHIFT; + + phy_info->remote_rx = + (phy_data & SR_1000T_REMOTE_RX_STATUS) + >> SR_1000T_REMOTE_RX_STATUS_SHIFT; + } + + break; + default: + DEBUGOUT("Invalid PHY ID\n"); + return -E1000_ERR_PHY_TYPE; + } + + return E1000_SUCCESS; #else /* ifdef EXTERNAL_MDIO */ - return -E1000_ERR_PHY_TYPE; + return -E1000_ERR_PHY_TYPE; #endif /* ifdef EXTERNAL_MDIO */ } @@ -1995,57 +2014,56 @@ e1000_oem_phy_get_info(struct e1000_hw *hw, * This function will perform a software initiated reset of * the PHY **/ -int32_t -e1000_oem_phy_hw_reset(struct e1000_hw *hw) +int32_t e1000_oem_phy_hw_reset(struct e1000_hw * hw) { #ifdef EXTERNAL_MDIO - int32_t ret_val; - uint16_t phy_data; - - DEBUGFUNC1("%s",__func__); - - if(!hw) { - return -1; - } - /* - * This code pretty much copies the default case from - * e1000_phy_reset() as that is what is appropriate for - * the M88 used in truxton. - */ - switch (hw->phy_id) { - case M88E1000_I_PHY_ID: - case M88E1141_E_PHY_ID: - case VSC8211_E_PHY_ID: - case VSC8601_E_PHY_ID: - ret_val = e1000_oem_read_phy_reg_ex(hw, PHY_CTRL, &phy_data); - if(ret_val) { - DEBUGOUT("Unable to read register PHY_CTRL\n"); - return ret_val; - } - - phy_data |= MII_CR_RESET; - ret_val = e1000_oem_write_phy_reg_ex(hw, PHY_CTRL, phy_data); - if(ret_val) { - DEBUGOUT("Unable to write register PHY_CTRL\n"); - return ret_val; - } - - udelay(1); - break; - case NON_PHY_PORT: - /* do nothing */ - break; - default: - DEBUGOUT("Invalid PHY ID\n"); - return -E1000_ERR_PHY_TYPE; - } - - return E1000_SUCCESS; + int32_t ret_val; + uint16_t phy_data; + + DEBUGFUNC1("%s", __func__); + + if (!hw) { + return -1; + } + /* + * This code pretty much copies the default case from + * e1000_phy_reset() as that is what is appropriate for + * the M88 used in truxton. + */ + switch (hw->phy_id) { + case M88E1000_I_PHY_ID: + case M88E1141_E_PHY_ID: + case VSC8211_E_PHY_ID: + case VSC8601_E_PHY_ID: + ret_val = e1000_oem_read_phy_reg_ex(hw, PHY_CTRL, &phy_data); + if (ret_val) { + DEBUGOUT("Unable to read register PHY_CTRL\n"); + return ret_val; + } + + phy_data |= MII_CR_RESET; + ret_val = e1000_oem_write_phy_reg_ex(hw, PHY_CTRL, phy_data); + if (ret_val) { + DEBUGOUT("Unable to write register PHY_CTRL\n"); + return ret_val; + } + + udelay(1); + break; + case NON_PHY_PORT: + /* do nothing */ + break; + default: + DEBUGOUT("Invalid PHY ID\n"); + return -E1000_ERR_PHY_TYPE; + } + + return E1000_SUCCESS; #else /* ifdef EXTERNAL_MDIO */ - return -E1000_ERR_PHY_TYPE; + return -E1000_ERR_PHY_TYPE; #endif /* ifdef EXTERNAL_MDIO */ } @@ -2058,42 +2076,41 @@ e1000_oem_phy_hw_reset(struct e1000_hw *hw) * to perform and post reset initialiation. Not all PHYs require * this, which is why it was split off as a seperate function. **/ -void -e1000_oem_phy_init_script(struct e1000_hw *hw) +void e1000_oem_phy_init_script(struct e1000_hw *hw) { #ifdef EXTERNAL_MDIO - DEBUGFUNC1("%s",__func__); - - if(!hw) { - return; - } - - /* call the GCU func that can do any phy specific init - * functions after a reset - * - * Make note that the M88 phy is what'll be used on Truxton - * - * The closest thing is in e1000_phy_init_script, however this is - * for the IGP style of phy. This is probably a no-op for truxton - * but may be needed by OEM's later on - * - */ - switch (hw->phy_id) { - case M88E1000_I_PHY_ID: - case M88E1141_E_PHY_ID: - case VSC8211_E_PHY_ID: - case VSC8601_E_PHY_ID: - case NON_PHY_PORT: - DEBUGOUT("Nothing to do for OEM PHY Init"); - break; - default: - DEBUGOUT("Invalid PHY ID\n"); - return; - } + DEBUGFUNC1("%s", __func__); + + if (!hw) { + return; + } + + /* call the GCU func that can do any phy specific init + * functions after a reset + * + * Make note that the M88 phy is what'll be used on Truxton + * + * The closest thing is in e1000_phy_init_script, however this is + * for the IGP style of phy. This is probably a no-op for truxton + * but may be needed by OEM's later on + * + */ + switch (hw->phy_id) { + case M88E1000_I_PHY_ID: + case M88E1141_E_PHY_ID: + case VSC8211_E_PHY_ID: + case VSC8601_E_PHY_ID: + case NON_PHY_PORT: + DEBUGOUT("Nothing to do for OEM PHY Init"); + break; + default: + DEBUGOUT("Invalid PHY ID\n"); + return; + } #endif /* ifdef EXTERNAL_MDIO */ - return; + return; } @@ -2107,45 +2124,45 @@ e1000_oem_phy_init_script(struct e1000_hw *hw) * to the MDIO for the PHY. **/ int32_t -e1000_oem_read_phy_reg_ex(struct e1000_hw *hw, - uint32_t reg_addr, - uint16_t *phy_data) +e1000_oem_read_phy_reg_ex(struct e1000_hw * hw, + uint32_t reg_addr, uint16_t * phy_data) { #ifdef EXTERNAL_MDIO - int32_t ret_val; + int32_t ret_val; - DEBUGFUNC1("%s",__func__); + DEBUGFUNC1("%s", __func__); - if(!hw || !phy_data) { - return -1; - } + if (!hw || !phy_data) { + return -1; + } - /* call the GCU func that will read the phy - * - * Make note that the M88 phy is what'll be used on Truxton. - * - * The closest thing is in e1000_read_phy_reg_ex. - * - * NOTE: this is 1 (of 2) functions that is truly dependant on the - * gcu module - */ + /* call the GCU func that will read the phy + * + * Make note that the M88 phy is what'll be used on Truxton. + * + * The closest thing is in e1000_read_phy_reg_ex. + * + * NOTE: this is 1 (of 2) functions that is truly dependant on the + * gcu module + */ - ret_val = gcu_read_eth_phy(e1000_oem_get_phy_dev_number(hw), - reg_addr, phy_data); - if(ret_val) { - DEBUGOUT("Error reading GCU"); - return ret_val; - } + ret_val = gcu_read_eth_phy(e1000_oem_get_phy_dev_number(hw), + reg_addr, phy_data); + if (ret_val) { + DEBUGOUT("Error reading GCU"); + return ret_val; + } - return E1000_SUCCESS; + return E1000_SUCCESS; #else /* ifdef EXTERNAL_MDIO */ - return -E1000_ERR_PHY_TYPE; + return -E1000_ERR_PHY_TYPE; #endif /* ifdef EXTERNAL_MDIO */ } + /** * e1000_oem_set_trans_gasket * @hw: e1000_hw struct containing device specific information @@ -2155,43 +2172,42 @@ e1000_oem_read_phy_reg_ex(struct e1000_hw *hw, * This is called from e1000_config_mac_to_phy. Various supported * Phys may require the RGMII/RMII Translation gasket be set to RMII. **/ -int32_t -e1000_oem_set_trans_gasket(struct e1000_hw *hw) +int32_t e1000_oem_set_trans_gasket(struct e1000_hw * hw) { #ifdef EXTERNAL_MDIO - uint32_t ctrl_aux_reg = 0; - - DEBUGFUNC1("%s",__func__); - - if(!hw) { - return -1; - } - - switch (hw->phy_id) { - case M88E1000_I_PHY_ID: - case M88E1141_E_PHY_ID: - /* Gasket set correctly for Marvell Phys, so nothing to do */ - break; - /* Add your PHY_ID here if your device requires an RMII interface - case YOUR_PHY_ID: - ctrl_aux_reg = E1000_READ_REG(hw, CTRL_AUX); - ctrl_aux_reg |= E1000_CTRL_AUX_ICP_xxxx_MII_TGS; // Set the RGMII_RMII bit - */ - E1000_WRITE_REG(hw, CTRL_AUX, ctrl_aux_reg); - break; - case VSC8211_E_PHY_ID: - case VSC8601_E_PHY_ID: - break; - default: - DEBUGOUT("Invalid PHY ID\n"); - return -E1000_ERR_PHY_TYPE; - } - - return E1000_SUCCESS; + uint32_t ctrl_aux_reg = 0; + + DEBUGFUNC1("%s", __func__); + + if (!hw) { + return -1; + } + + switch (hw->phy_id) { + case M88E1000_I_PHY_ID: + case M88E1141_E_PHY_ID: + /* Gasket set correctly for Marvell Phys, so nothing to do */ + break; + /* Add your PHY_ID here if your device requires an RMII interface + case YOUR_PHY_ID: + ctrl_aux_reg = E1000_READ_REG(hw, CTRL_AUX); + ctrl_aux_reg |= E1000_CTRL_AUX_ICP_xxxx_MII_TGS; // Set the RGMII_RMII bit + */ + E1000_WRITE_REG(hw, CTRL_AUX, ctrl_aux_reg); + break; + case VSC8211_E_PHY_ID: + case VSC8601_E_PHY_ID: + break; + default: + DEBUGOUT("Invalid PHY ID\n"); + return -E1000_ERR_PHY_TYPE; + } + + return E1000_SUCCESS; #else /* ifdef EXTERNAL_MDIO */ - return -E1000_ERR_PHY_TYPE; + return -E1000_ERR_PHY_TYPE; #endif /* ifdef EXTERNAL_MDIO */ } @@ -2206,45 +2222,43 @@ e1000_oem_set_trans_gasket(struct e1000_hw *hw) * to the MDIO for the PHY. **/ int32_t -e1000_oem_write_phy_reg_ex(struct e1000_hw *hw, - uint32_t reg_addr, - uint16_t phy_data) +e1000_oem_write_phy_reg_ex(struct e1000_hw * hw, + uint32_t reg_addr, uint16_t phy_data) { #ifdef EXTERNAL_MDIO - int32_t ret_val; - - DEBUGFUNC1("%s",__func__); - - if(!hw) { - return -1; - } - /* call the GCU func that will write to the phy - * - * Make note that the M88 phy is what'll be used on Truxton. - * - * The closest thing is in e1000_write_phy_reg_ex - * - * NOTE: this is 2 (of 2) functions that is truly dependant on the - * gcu module - */ - ret_val = gcu_write_eth_phy(e1000_oem_get_phy_dev_number(hw), - reg_addr, phy_data); - if(ret_val) { - DEBUGOUT("Error writing to GCU"); - return ret_val; - } - - return E1000_SUCCESS; + int32_t ret_val; + + DEBUGFUNC1("%s", __func__); + + if (!hw) { + return -1; + } + /* call the GCU func that will write to the phy + * + * Make note that the M88 phy is what'll be used on Truxton. + * + * The closest thing is in e1000_write_phy_reg_ex + * + * NOTE: this is 2 (of 2) functions that is truly dependant on the + * gcu module + */ + ret_val = gcu_write_eth_phy(e1000_oem_get_phy_dev_number(hw), + reg_addr, phy_data); + if (ret_val) { + DEBUGOUT("Error writing to GCU"); + return ret_val; + } + + return E1000_SUCCESS; #else /* ifdef EXTERNAL_MDIO */ - return -E1000_ERR_PHY_TYPE; + return -E1000_ERR_PHY_TYPE; #endif /* ifdef EXTERNAL_MDIO */ } - /** * e1000_oem_phy_needs_reset_with_mac * @hw struct e1000_hw hardware specific data @@ -2254,47 +2268,45 @@ e1000_oem_write_phy_reg_ex(struct e1000_hw *hw, * should return TRUE and then e1000_oem_phy_hw_reset() * will be called. **/ -int -e1000_oem_phy_needs_reset_with_mac(struct e1000_hw *hw) +int e1000_oem_phy_needs_reset_with_mac(struct e1000_hw *hw) { #ifdef EXTERNAL_MDIO - int ret_val; - - DEBUGFUNC1("%s",__func__); - - if(!hw) { - return FALSE; - } - - /* - * From the original e1000 driver, the M88 - * PHYs did not seem to need this reset, - * so returning FALSE. - */ - switch (hw->phy_id) { - case M88E1000_I_PHY_ID: - case M88E1141_E_PHY_ID: - case VSC8211_E_PHY_ID: - case VSC8601_E_PHY_ID: - case NON_PHY_PORT: - ret_val = FALSE; - break; - default: - DEBUGOUT("Invalid PHY ID\n"); - return FALSE; - } - - return ret_val; + int ret_val; + + DEBUGFUNC1("%s", __func__); + + if (!hw) { + return FALSE; + } + + /* + * From the original e1000 driver, the M88 + * PHYs did not seem to need this reset, + * so returning FALSE. + */ + switch (hw->phy_id) { + case M88E1000_I_PHY_ID: + case M88E1141_E_PHY_ID: + case VSC8211_E_PHY_ID: + case VSC8601_E_PHY_ID: + case NON_PHY_PORT: + ret_val = FALSE; + break; + default: + DEBUGOUT("Invalid PHY ID\n"); + return FALSE; + } + + return ret_val; #else /* ifdef EXTERNAL_MDIO */ - return FALSE; + return FALSE; #endif /* ifdef EXTERNAL_MDIO */ } - /** * e1000_oem_config_dsp_after_link_change * @hw struct e1000_hw containing hardware specific data @@ -2306,46 +2318,44 @@ e1000_oem_phy_needs_reset_with_mac(struct e1000_hw *hw) * **/ int32_t -e1000_oem_config_dsp_after_link_change(struct e1000_hw *hw, - int link_up) +e1000_oem_config_dsp_after_link_change(struct e1000_hw * hw, int link_up) { #ifdef EXTERNAL_MDIO - DEBUGFUNC1("%s",__func__); - - if(!hw) { - return -1; - } - - /* - * Make note that the M88 phy is what'll be used on Truxton, - * but in the e1000 driver, it had no such func. This is a no-op - * for M88, but may be useful for other phys - * - * use e1000_config_dsp_after_link_change as example - */ - switch (hw->phy_id) { - case M88E1000_I_PHY_ID: - case M88E1141_E_PHY_ID: - case VSC8211_E_PHY_ID: - case VSC8601_E_PHY_ID: - DEBUGOUT("No DSP to configure on OEM PHY"); - break; - default: - DEBUGOUT("Invalid PHY ID\n"); - return -E1000_ERR_PHY_TYPE; - } - - return E1000_SUCCESS; + DEBUGFUNC1("%s", __func__); + + if (!hw) { + return -1; + } + + /* + * Make note that the M88 phy is what'll be used on Truxton, + * but in the e1000 driver, it had no such func. This is a no-op + * for M88, but may be useful for other phys + * + * use e1000_config_dsp_after_link_change as example + */ + switch (hw->phy_id) { + case M88E1000_I_PHY_ID: + case M88E1141_E_PHY_ID: + case VSC8211_E_PHY_ID: + case VSC8601_E_PHY_ID: + DEBUGOUT("No DSP to configure on OEM PHY"); + break; + default: + DEBUGOUT("Invalid PHY ID\n"); + return -E1000_ERR_PHY_TYPE; + } + + return E1000_SUCCESS; #else /* ifdef EXTERNAL_MDIO */ - return -E1000_ERR_PHY_TYPE; + return -E1000_ERR_PHY_TYPE; #endif /* ifdef EXTERNAL_MDIO */ } - /** * e1000_oem_get_cable_length * @hw struct e1000_hw containing hardware specific data @@ -2355,77 +2365,75 @@ e1000_oem_config_dsp_after_link_change(struct e1000_hw *hw, * **/ int32_t -e1000_oem_get_cable_length(struct e1000_hw *hw, - uint16_t *min_length, - uint16_t *max_length) +e1000_oem_get_cable_length(struct e1000_hw * hw, + uint16_t * min_length, uint16_t * max_length) { #ifdef EXTERNAL_MDIO - int32_t ret_val; - uint16_t cable_length; - uint16_t phy_data; - - DEBUGFUNC1("%s",__func__); - - if(!hw || !min_length || !max_length) { - return -1; - } - - switch (hw->phy_id) { - case M88E1000_I_PHY_ID: - case M88E1141_E_PHY_ID: - ret_val = e1000_oem_read_phy_reg_ex(hw, - M88E1000_PHY_SPEC_STATUS, - &phy_data); - if(ret_val) { - return ret_val; - } - - cable_length = (phy_data & M88E1000_PSSR_CABLE_LENGTH) - >> M88E1000_PSSR_CABLE_LENGTH_SHIFT; - - /* Convert the enum value to ranged values */ - switch (cable_length) { - case e1000_cable_length_50: - *min_length = 0; - *max_length = e1000_igp_cable_length_50; - break; - case e1000_cable_length_50_80: - *min_length = e1000_igp_cable_length_50; - *max_length = e1000_igp_cable_length_80; - break; - case e1000_cable_length_80_110: - *min_length = e1000_igp_cable_length_80; - *max_length = e1000_igp_cable_length_110; - break; - case e1000_cable_length_110_140: - *min_length = e1000_igp_cable_length_110; - *max_length = e1000_igp_cable_length_140; - break; - case e1000_cable_length_140: - *min_length = e1000_igp_cable_length_140; - *max_length = e1000_igp_cable_length_170; - break; - default: - return -E1000_ERR_PHY; - break; - } - break; - default: - DEBUGOUT("Invalid PHY ID\n"); - return -E1000_ERR_PHY_TYPE; - } - - return E1000_SUCCESS; + int32_t ret_val; + uint16_t cable_length; + uint16_t phy_data; + + DEBUGFUNC1("%s", __func__); + + if (!hw || !min_length || !max_length) { + return -1; + } + + switch (hw->phy_id) { + case M88E1000_I_PHY_ID: + case M88E1141_E_PHY_ID: + ret_val = e1000_oem_read_phy_reg_ex(hw, + M88E1000_PHY_SPEC_STATUS, + &phy_data); + if (ret_val) { + return ret_val; + } + + cable_length = (phy_data & M88E1000_PSSR_CABLE_LENGTH) + >> M88E1000_PSSR_CABLE_LENGTH_SHIFT; + + /* Convert the enum value to ranged values */ + switch (cable_length) { + case e1000_cable_length_50: + *min_length = 0; + *max_length = e1000_igp_cable_length_50; + break; + case e1000_cable_length_50_80: + *min_length = e1000_igp_cable_length_50; + *max_length = e1000_igp_cable_length_80; + break; + case e1000_cable_length_80_110: + *min_length = e1000_igp_cable_length_80; + *max_length = e1000_igp_cable_length_110; + break; + case e1000_cable_length_110_140: + *min_length = e1000_igp_cable_length_110; + *max_length = e1000_igp_cable_length_140; + break; + case e1000_cable_length_140: + *min_length = e1000_igp_cable_length_140; + *max_length = e1000_igp_cable_length_170; + break; + default: + return -E1000_ERR_PHY; + break; + } + break; + default: + DEBUGOUT("Invalid PHY ID\n"); + return -E1000_ERR_PHY_TYPE; + } + + return E1000_SUCCESS; #else /* ifdef EXTERNAL_MDIO */ - return -E1000_ERR_PHY_TYPE; + return -E1000_ERR_PHY_TYPE; #endif /* ifdef EXTERNAL_MDIO */ } - /** * e1000_oem_phy_is_link_up * @hw e1000_hw struct containing device specific information @@ -2435,63 +2443,63 @@ e1000_oem_get_cable_length(struct e1000_hw *hw, * the MAC with the PHY. It turns out on ICP_XXXX, this is not * done automagically. **/ -int32_t -e1000_oem_phy_is_link_up(struct e1000_hw *hw, int *isUp) +int32_t e1000_oem_phy_is_link_up(struct e1000_hw * hw, int *isUp) { #ifdef EXTERNAL_MDIO - uint16_t phy_data; - uint16_t statusMask; - int32_t ret_val; - - DEBUGFUNC1("%s",__func__); - - if(!hw || !isUp) { - return -1; - } - /* - * Make note that the M88 phy is what'll be used on Truxton - * see e1000_config_mac_to_phy - */ - - switch (hw->phy_id) { - case M88E1000_I_PHY_ID: - case M88E1141_E_PHY_ID: - e1000_oem_read_phy_reg_ex(hw, M88E1000_PHY_SPEC_STATUS, &phy_data); - ret_val = e1000_oem_read_phy_reg_ex(hw, M88E1000_PHY_SPEC_STATUS, - &phy_data); - statusMask = M88E1000_PSSR_LINK; - break; - case VSC8211_E_PHY_ID: - case VSC8601_E_PHY_ID: - ret_val = e1000_oem_read_phy_reg_ex(hw, PHY_STATUS, &phy_data); - statusMask = MII_SR_LINK_STATUS; - break; - case NON_PHY_PORT: - ret_val = E1000_SUCCESS; - phy_data = statusMask = 1; /* to make the condition always true */ - break; - default: - DEBUGOUT("Invalid PHY ID\n"); - return -E1000_ERR_PHY_TYPE; - } - if(ret_val) { - DEBUGOUT("Unable to read PHY register\n"); - return ret_val; - } - - *isUp = (phy_data & statusMask) != 0; - - return E1000_SUCCESS; + uint16_t phy_data; + uint16_t statusMask; + int32_t ret_val; + + DEBUGFUNC1("%s", __func__); + + if (!hw || !isUp) { + return -1; + } + /* + * Make note that the M88 phy is what'll be used on Truxton + * see e1000_config_mac_to_phy + */ + + switch (hw->phy_id) { + case M88E1000_I_PHY_ID: + case M88E1141_E_PHY_ID: + e1000_oem_read_phy_reg_ex(hw, M88E1000_PHY_SPEC_STATUS, + &phy_data); + ret_val = + e1000_oem_read_phy_reg_ex(hw, M88E1000_PHY_SPEC_STATUS, + &phy_data); + statusMask = M88E1000_PSSR_LINK; + break; + case VSC8211_E_PHY_ID: + case VSC8601_E_PHY_ID: + ret_val = e1000_oem_read_phy_reg_ex(hw, PHY_STATUS, &phy_data); + statusMask = MII_SR_LINK_STATUS; + break; + case NON_PHY_PORT: + ret_val = E1000_SUCCESS; + phy_data = statusMask = 1; /* to make the condition always true */ + break; + default: + DEBUGOUT("Invalid PHY ID\n"); + return -E1000_ERR_PHY_TYPE; + } + if (ret_val) { + DEBUGOUT("Unable to read PHY register\n"); + return ret_val; + } + + *isUp = (phy_data & statusMask) != 0; + + return E1000_SUCCESS; #else /* ifdef EXTERNAL_MDIO */ - if(!hw || !isFD) { - return -1; - } - *isUp = FALSE; - return -E1000_ERR_PHY_TYPE; + if (!hw || !isFD) { + return -1; + } + *isUp = FALSE; + return -E1000_ERR_PHY_TYPE; #endif /* ifdef EXTERNAL_MDIO */ } - |