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-rw-r--r--tdm/xivo_tdm.c10
-rw-r--r--tdm/xivo_tdm_api.h3
-rw-r--r--xhfc/base.c5
-rw-r--r--xhfc/xhfc_leb.c15
4 files changed, 29 insertions, 4 deletions
diff --git a/tdm/xivo_tdm.c b/tdm/xivo_tdm.c
index edd8c3a..ef170b1 100644
--- a/tdm/xivo_tdm.c
+++ b/tdm/xivo_tdm.c
@@ -134,6 +134,8 @@ static struct xivo_tdm_callbacks_struct xivo_tdm_callbacks;
/* our local counters are coded on one byte: */
#define LOCAL_CPT_MASK (0xffu)
+static u8 __iomem *g_cs_n2;
+
struct local_cpt {
u8 tail;
u8 head;
@@ -459,11 +461,14 @@ EXPORT_SYMBOL(xivo_tdm_put_port);
int xivo_tdm_config_port(
struct xivo_tdm_port* xtp,
- unsigned int port_config)
+ unsigned int port_config,
+ u8 __iomem *cs_n2)
{
icp_status_t status;
icp_hssacc_port_config_params_t hss_port_config;
+ g_cs_n2 = cs_n2;
+
if (port_config >= ICP_HSSDRV_PORT_CONFIG_DELIMITER) {
printk(KERN_ERR "%s: invalid port config %u\n",
__func__, port_config);
@@ -949,6 +954,9 @@ void xivo_tdm_trigger_handler(void)
DBG_TRACE("-- rx -- %lu\n", delta_tsc);
}
+ if (g_cs_n2)
+ writeb(0, g_cs_n2);
+
do {
const u32 rx_entry = vrxq_info->queue.content[ // volatile
(cpt[LOCAL_VOICE_RX_Q].wordTail++)
diff --git a/tdm/xivo_tdm_api.h b/tdm/xivo_tdm_api.h
index a206f66..34e6ad1 100644
--- a/tdm/xivo_tdm_api.h
+++ b/tdm/xivo_tdm_api.h
@@ -48,7 +48,8 @@ void xivo_tdm_put_port(struct xivo_tdm_port *);
/* hardirq: no -- softirq: no -- user: yes */
int xivo_tdm_config_port(
struct xivo_tdm_port* xtp,
- unsigned int port_config);
+ unsigned int port_config,
+ u8 __iomem *cs_n2);
/* will be called back after port 0 has been configured */
void xivo_tdm_register_port0_configured(
diff --git a/xhfc/base.c b/xhfc/base.c
index e37aef0..0a385ad 100644
--- a/xhfc/base.c
+++ b/xhfc/base.c
@@ -1079,6 +1079,7 @@ static int __devinit xhfc_init_one(struct pci_dev *pdev,
u8 **readchunk_ptrs[XIVO_TDM_TS_NUM] = { 0 };
u8 **writechunk_ptrs[XIVO_TDM_TS_NUM] = { 0 };
#endif
+ u8 __iomem *cs_n2;
pi = g_pi;
@@ -1119,6 +1120,7 @@ static int __devinit xhfc_init_one(struct pci_dev *pdev,
/* we have no LEB CS configured to 32MB, so CS are every 16MB
* see [Intel 320066] 42.4.1.1 Chip Select Address Allocation */
pi->cs_n1 = pi->cs_n0 + 16 * 1024 * 1024;
+ cs_n2 = pi->cs_n0 + 32 * 1024 * 1024;
/* WARNING: don't use cs_n0 / cs_n1 before leb_init() */
@@ -1188,7 +1190,8 @@ static int __devinit xhfc_init_one(struct pci_dev *pdev,
/* TDM started on the XHFC side, XHFC is MASTER */
/* Now it's possible to start the TDM bus on the EP80579 side, as SLAVE: */
if ((rc = xivo_tdm_config_port(pi->tdm_port,
- XHFC_MEGREZ_PROTO_XIVO_CONFIG)) < 0) {
+ XHFC_MEGREZ_PROTO_XIVO_CONFIG,
+ cs_n2)) < 0) {
printk(KERN_ERR "%s %s: xivo_tdm_config_port failed (err=%d)\n",
DRIVER_NAME, __func__, rc);
goto err_tdm_config_port;
diff --git a/xhfc/xhfc_leb.c b/xhfc/xhfc_leb.c
index 42e7b9d..c7e94d7 100644
--- a/xhfc/xhfc_leb.c
+++ b/xhfc/xhfc_leb.c
@@ -128,8 +128,21 @@ void leb_init(struct xhfc_pi *leb)
| LEB_TCS_BYTE_EN,
&regs->timing_cs[1]);
+ writel( LEB_TCS_CS_EN
+ | LEB_TCS_T1_ADDR_TM(3)
+ | LEB_TCS_T2_SU_CS_TM(3)
+ | LEB_TCS_T3_STRB_TM(3)
+ | LEB_TCS_T4_HOLD_TM(3)
+ | LEB_TCS_T5_RCVRY_TM(3)
+ | LEB_TCS_CYC_TYPE_INTEL
+ | LEB_TCS_CNFG_512_B
+ | LEB_TCS_SPLT_EN
+ | LEB_TCS_WR_EN
+ | LEB_TCS_BYTE_EN,
+ &regs->timing_cs[2]);
+
/* We are true paranoiacs: */
- (void)readl(&regs->timing_cs[1]);
+ (void)readl(&regs->timing_cs[2]);
/* That's it! :-) */
}