diff options
Diffstat (limited to 'src/mainboard')
-rw-r--r-- | src/mainboard/intel/eagleheights/romstage.c | 2 | ||||
-rw-r--r-- | src/mainboard/intel/mtarvon/romstage.c | 2 | ||||
-rw-r--r-- | src/mainboard/intel/truxton/Kconfig | 1 | ||||
-rw-r--r-- | src/mainboard/intel/truxton/romstage.c | 32 |
4 files changed, 7 insertions, 30 deletions
diff --git a/src/mainboard/intel/eagleheights/romstage.c b/src/mainboard/intel/eagleheights/romstage.c index a250c05c6..822333349 100644 --- a/src/mainboard/intel/eagleheights/romstage.c +++ b/src/mainboard/intel/eagleheights/romstage.c @@ -31,7 +31,7 @@ #include <console/console.h> #include <cpu/x86/bist.h> #include <cpu/intel/acpi.h> -#include "southbridge/intel/i3100/early_smbus.c" +#include "southbridge/intel/i3100/early_smbus.h" #include "southbridge/intel/i3100/early_lpc.c" #include "reset.c" #include "superio/intel/i3100/early_serial.c" diff --git a/src/mainboard/intel/mtarvon/romstage.c b/src/mainboard/intel/mtarvon/romstage.c index b2bba3a84..6e289a540 100644 --- a/src/mainboard/intel/mtarvon/romstage.c +++ b/src/mainboard/intel/mtarvon/romstage.c @@ -27,7 +27,7 @@ #include <cpu/x86/lapic.h> #include <pc80/mc146818rtc.h> #include <console/console.h> -#include "southbridge/intel/i3100/early_smbus.c" +#include "southbridge/intel/i3100/early_smbus.h" #include "southbridge/intel/i3100/early_lpc.c" #include "northbridge/intel/i3100/raminit.h" #include "superio/intel/i3100/i3100.h" diff --git a/src/mainboard/intel/truxton/Kconfig b/src/mainboard/intel/truxton/Kconfig index c902f1fa1..d4dc29466 100644 --- a/src/mainboard/intel/truxton/Kconfig +++ b/src/mainboard/intel/truxton/Kconfig @@ -8,7 +8,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select SOUTHBRIDGE_INTEL_I3100 select SUPERIO_INTEL_I3100 select SUPERIO_SMSC_SMSCSUPERIO - select ROMCC select HAVE_HARD_RESET select UDELAY_TSC select BOARD_ROMSIZE_KB_2048 diff --git a/src/mainboard/intel/truxton/romstage.c b/src/mainboard/intel/truxton/romstage.c index c836b9c76..b17ec2fde 100644 --- a/src/mainboard/intel/truxton/romstage.c +++ b/src/mainboard/intel/truxton/romstage.c @@ -28,15 +28,15 @@ #include <pc80/mc146818rtc.h> #include "pc80/udelay_io.c" #include <console/console.h> -#include "southbridge/intel/i3100/early_smbus.c" +#include "southbridge/intel/i3100/early_smbus.h" #include "southbridge/intel/i3100/early_lpc.c" #include "northbridge/intel/i3100/raminit_ep80579.h" #include "superio/intel/i3100/i3100.h" -#include "cpu/x86/lapic/boot_cpu.c" -#include "cpu/x86/mtrr/earlymtrr.c" #include "superio/intel/i3100/early_serial.c" #include "cpu/x86/bist.h" +#include <lib.h> #include <spd.h> +#include "lib/generic_sdram.c" /* SATA */ #define SATA_MODE_IDE 0x00 @@ -55,12 +55,6 @@ #define RCBA_D29IR 0x3144 /* 16 bit */ #define RCBA_D28IR 0x3146 /* 16 bit */ -#define DEVPRES_CONFIG (DEVPRES_D1F0 | DEVPRES_D2F0 | DEVPRES_D3F0 | DEVPRES_D4F0) - -static inline int spd_read_byte(u16 device, u8 address) -{ - return smbus_read_byte(device, address); -} static void early_config(void) { @@ -96,18 +90,12 @@ static void early_config(void) pci_write_config8(PCI_DEV(0, 0x1F, 2), SATA_MAP, (SATA_MODE_AHCI << 6) | (0 << 0)); } -#include "northbridge/intel/i3100/raminit_ep80579.c" -#include "lib/generic_sdram.c" -#include "../../intel/jarrell/debug.c" -#include "arch/x86/lib/stages.c" #define SERIAL_DEV PNP_DEV(0x4e, I3100_SP1) -static void main(unsigned long bist) +void main(unsigned long bist) { - msr_t msr; - u16 perf; - static const struct mem_controller mch[] = { + const struct mem_controller mch[] = { { .node_id = 0, .f0 = PCI_DEV(0, 0x00, 0), @@ -117,7 +105,6 @@ static void main(unsigned long bist) if (bist == 0) { /* Skip this if there was a built in self test failure */ - early_mtrr_init(); if (memory_initialized()) { /* Reboot doesn't work right now, so if we're rebooting * force a HARD reboot by using the 0xe into CF9h @@ -145,18 +132,9 @@ static void main(unsigned long bist) /* Halt if there was a built in self test failure */ report_bist_failure(bist); -#ifdef TRUXTON_DEBUG - print_pci_devices(); -#endif enable_smbus(); - dump_spd_registers(); sdram_initialize(ARRAY_SIZE(mch), mch); - dump_pci_devices(); - dump_pci_device(PCI_DEV(0, 0x00, 0)); -#ifdef TRUXTON_DEBUG - dump_bar14(PCI_DEV(0, 0x00, 0)); -#endif early_config(); } |