diff options
| author | Stefan Reinauer <reinauer@google.com> | 2011-04-26 23:47:04 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2011-04-26 23:47:04 +0000 |
| commit | 72e8d50c1439151d193d7d79dd1ee784bac240ce (patch) | |
| tree | 9b068b5645f5aa60fd310919c0a08ce3dea34b3f /src/arch/x86 | |
| parent | 39d0af3d8c67a5e358e4a2847c1d5373a2422bcd (diff) | |
Add support for memory mapped UARTs to coreboot and add the OXPCIe952 as an
example.
This newer version reflects the recent changes to further simplify the console
code and partly gets rid of some hacks in the previous version.
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6544 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/arch/x86')
| -rw-r--r-- | src/arch/x86/boot/coreboot_table.c | 3 | ||||
| -rw-r--r-- | src/arch/x86/lib/romstage_console.c | 5 |
2 files changed, 7 insertions, 1 deletions
diff --git a/src/arch/x86/boot/coreboot_table.c b/src/arch/x86/boot/coreboot_table.c index 634cefd43..db3a8a9b5 100644 --- a/src/arch/x86/boot/coreboot_table.c +++ b/src/arch/x86/boot/coreboot_table.c @@ -135,6 +135,9 @@ static void lb_console(struct lb_header *header) #if CONFIG_CONSOLE_SERIAL8250 add_console(header, LB_TAG_CONSOLE_SERIAL8250); #endif +#if CONFIG_CONSOLE_SERIAL8250MEM + add_console(header, LB_TAG_CONSOLE_SERIAL8250MEM); +#endif #if CONFIG_CONSOLE_LOGBUF add_console(header, LB_TAG_CONSOLE_LOGBUF); #endif diff --git a/src/arch/x86/lib/romstage_console.c b/src/arch/x86/lib/romstage_console.c index e8a926356..a5f2e2b07 100644 --- a/src/arch/x86/lib/romstage_console.c +++ b/src/arch/x86/lib/romstage_console.c @@ -19,7 +19,7 @@ #include <console/console.h> #include <console/vtxprintf.h> -#if CONFIG_CONSOLE_SERIAL8250 +#if CONFIG_CONSOLE_SERIAL8250 || CONFIG_CONSOLE_SERIAL8250MEM #include <uart8250.h> #endif #if CONFIG_USBDEBUG @@ -34,6 +34,9 @@ static void console_tx_byte(unsigned char byte) if (byte == '\n') console_tx_byte('\r'); +#if CONFIG_CONSOLE_SERIAL8250MEM + uart8250_mem_tx_byte(CONFIG_OXFORD_OXPCIE_BASE_ADDRESS + 0x1000, byte); +#endif #if CONFIG_CONSOLE_SERIAL8250 uart8250_tx_byte(CONFIG_TTYS0_BASE, byte); #endif |