diff options
| -rw-r--r-- | arch/x86/Makefrag.am | 1 | ||||
| -rw-r--r-- | arch/x86/machine/cpu.c | 1 | ||||
| -rw-r--r-- | arch/x86/machine/mb.h | 68 | ||||
| -rw-r--r-- | doc/intro.9.txt | 2 | ||||
| -rw-r--r-- | kern/llsync.h | 1 |
5 files changed, 0 insertions, 73 deletions
diff --git a/arch/x86/Makefrag.am b/arch/x86/Makefrag.am index 5bedee07..eb140bc6 100644 --- a/arch/x86/Makefrag.am +++ b/arch/x86/Makefrag.am @@ -43,7 +43,6 @@ x15_SOURCES += \ arch/x86/machine/io.h \ arch/x86/machine/lapic.c \ arch/x86/machine/lapic.h \ - arch/x86/machine/mb.h \ arch/x86/machine/multiboot.h \ arch/x86/machine/param.h \ arch/x86/machine/pic.c \ diff --git a/arch/x86/machine/cpu.c b/arch/x86/machine/cpu.c index 261e586e..ff860ba0 100644 --- a/arch/x86/machine/cpu.c +++ b/arch/x86/machine/cpu.c @@ -34,7 +34,6 @@ #include <machine/cpu.h> #include <machine/io.h> #include <machine/lapic.h> -#include <machine/mb.h> #include <machine/pmap.h> #include <machine/trap.h> #include <vm/vm_page.h> diff --git a/arch/x86/machine/mb.h b/arch/x86/machine/mb.h deleted file mode 100644 index 9fbd74bc..00000000 --- a/arch/x86/machine/mb.h +++ /dev/null @@ -1,68 +0,0 @@ -/* - * Copyright (c) 2012, 2013 Richard Braun. - * - * This program is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see <http://www.gnu.org/licenses/>. - * - * - * Memory barriers. - * - * Keep in mind that memory barriers only act on the ordering of loads and - * stores between internal processor queues and their caches. In particular, - * it doesn't imply a store is complete after the barrier has completed, only - * that other processors will see a new value thanks to the cache coherency - * protocol. Memory barriers alone aren't suitable for device communication. - * - * The x86 architectural memory model (total-store ordering) already enforces - * strong ordering for almost every access. The only exception is that stores - * can be reordered after loads. As a result, load and store memory barriers - * are simple compiler barriers whereas full memory barriers must generate - * a barrier instruction. - */ - -#ifndef _X86_MB_H -#define _X86_MB_H - -#include <kern/macros.h> - -#ifdef __LP64__ - -static inline void -mb_sync(void) -{ - asm volatile("mfence" : : : "memory"); -} - -#else /* __LP64__ */ - -static inline void -mb_sync(void) -{ - asm volatile("lock addl $0, 0(%%esp)" : : : "memory"); -} - -#endif /* __LP64__ */ - -static inline void -mb_load(void) -{ - barrier(); -} - -static inline void -mb_store(void) -{ - barrier(); -} - -#endif /* _X86_MB_H */ diff --git a/doc/intro.9.txt b/doc/intro.9.txt index c53f65f1..afac8e1c 100644 --- a/doc/intro.9.txt +++ b/doc/intro.9.txt @@ -152,8 +152,6 @@ module:kern/atomic:: Inter-processor atomic operations. module:kern/cpumap:: Specialized bitmaps representing processor sets. -module:arch/mb:: - Inter-processor memory barriers. module:kern/percpu:: Per-processor data. module:kern/spinlock:: diff --git a/kern/llsync.h b/kern/llsync.h index e95ed8c1..6736d6f9 100644 --- a/kern/llsync.h +++ b/kern/llsync.h @@ -77,7 +77,6 @@ #include <kern/llsync_i.h> #include <kern/thread.h> #include <kern/work.h> -#include <machine/mb.h> /* * Safely assign a pointer. |