diff options
| author | Richard Braun <rbraun@sceen.net> | 2013-03-14 22:27:30 +0100 |
|---|---|---|
| committer | Richard Braun <rbraun@sceen.net> | 2013-03-14 22:27:30 +0100 |
| commit | a1e1164f13bebb974c84060f02c6f7e327a2b27c (patch) | |
| tree | 9a3515787e331f0435bf56aa0ef569e0b000cf79 | |
| parent | ed09fa58fb5778d943b2636b13c873fa68d4daac (diff) | |
x86: remove store memory barriers
Use a compiler barrier instead of a memory barrier to enforce program order.
The x86 architecture normally enforces ordering on stores. There are
exceptions but they're currently not supported.
| -rw-r--r-- | arch/x86/machine/cpu.c | 3 | ||||
| -rw-r--r-- | arch/x86/machine/pmap.c | 2 |
2 files changed, 3 insertions, 2 deletions
diff --git a/arch/x86/machine/cpu.c b/arch/x86/machine/cpu.c index 0d1a9f38..eb0eb7e1 100644 --- a/arch/x86/machine/cpu.c +++ b/arch/x86/machine/cpu.c @@ -527,7 +527,8 @@ cpu_mp_start_aps(void) boot_ap_id = i; boot_ap_stack_addr = cpu->boot_stack; - mb_store(); + + barrier(); lapic_ipi_init_assert(cpu->apic_id); cpu_delay(200); diff --git a/arch/x86/machine/pmap.c b/arch/x86/machine/pmap.c index 6ed5826e..0bae943b 100644 --- a/arch/x86/machine/pmap.c +++ b/arch/x86/machine/pmap.c @@ -638,7 +638,7 @@ pmap_kupdate(unsigned long start, unsigned long end) pmap_update_start = start; pmap_update_end = end; pmap_nr_updates.count = nr_cpus - 1; - mb_store(); + barrier(); lapic_ipi_broadcast(TRAP_PMAP_UPDATE); /* |