diff options
| author | Remy Noel <mocramis@gmail.com> | 2017-10-01 15:09:38 +0200 |
|---|---|---|
| committer | Remy Noel <mocramis@gmail.com> | 2017-10-01 17:17:10 +0200 |
| commit | 3affdd390f5e12731c92021952917bfc4843b2f7 (patch) | |
| tree | 10f39eb5ba58543658dc485388662a4a18e4d42d /arch/x86/machine/cpu.h | |
| parent | 5c209f9abd290eaf9b29f98cfd4102ed2a93507f (diff) | |
Perfmon module prototype
Diffstat (limited to 'arch/x86/machine/cpu.h')
| -rw-r--r-- | arch/x86/machine/cpu.h | 23 |
1 files changed, 18 insertions, 5 deletions
diff --git a/arch/x86/machine/cpu.h b/arch/x86/machine/cpu.h index 39f17f8..5299013 100644 --- a/arch/x86/machine/cpu.h +++ b/arch/x86/machine/cpu.h @@ -215,9 +215,13 @@ struct cpu_tss { uint16_t iobp_base; } __packed; -#define CPU_VENDOR_ID_SIZE 13 +#define CPU_VENDOR_STR_SIZE 13 #define CPU_MODEL_NAME_SIZE 49 +#define CPU_VENDOR_UNKNOWN 0 +#define CPU_VENDOR_INTEL 1 +#define CPU_VENDOR_AMD 2 + /* * CPU states. */ @@ -227,8 +231,11 @@ struct cpu_tss { struct cpu { unsigned int id; unsigned int apic_id; - char vendor_id[CPU_VENDOR_ID_SIZE]; + char vendor_str[CPU_VENDOR_STR_SIZE]; char model_name[CPU_MODEL_NAME_SIZE]; + unsigned int cpuid_max_basic; + unsigned int cpuid_max_extended; + unsigned int vendor_id; unsigned int type; unsigned int family; unsigned int model; @@ -534,16 +541,22 @@ cpu_cpuid(unsigned int *eax, unsigned int *ebx, unsigned int *ecx, : : "memory"); } +/* + * Implies a compiler barrier. + */ static __always_inline void cpu_get_msr(uint32_t msr, uint32_t *high, uint32_t *low) { - asm volatile("rdmsr" : "=a" (*low), "=d" (*high) : "c" (msr)); + asm volatile("rdmsr" : "=a" (*low), "=d" (*high) : "c" (msr) : "memory"); } -static __always_inline void +/* + * Implies a full memory barrier. + */ +static inline void cpu_set_msr(uint32_t msr, uint32_t high, uint32_t low) { - asm volatile("wrmsr" : : "c" (msr), "a" (low), "d" (high)); + asm volatile("wrmsr" : : "c" (msr), "a" (low), "d" (high) : "memory"); } static __always_inline uint64_t |