| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2021-01-06 | spi: tegra210-quad: Add support for hardware dummy cycles transfer | Sowjanya Komatineni | |
| Tegra Quad SPI controller hardware supports sending dummy bytes based on programmed dummy clock cycles after the actual transfer bytes. This patch adds this support of hardware dummy bytes transfer and skips transfer of dummy bytes from the software. For dummy cycles more than Tegra Quad SPI hardware maximum dummy cycles limit, driver transfers dummy bytes from the software. Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Link: https://lore.kernel.org/r/1608585459-17250-7-git-send-email-skomatineni@nvidia.com Signed-off-by: Mark Brown <broonie@kernel.org> | |||
| 2021-01-06 | spi: tegra210-quad: Add support for Tegra210 QSPI controller | Sowjanya Komatineni | |
| Tegra SoC has a Quad SPI controller starting from Tegra210. This patch adds support for Tegra210 QSPI controller. Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Link: https://lore.kernel.org/r/1608585459-17250-5-git-send-email-skomatineni@nvidia.com Signed-off-by: Mark Brown <broonie@kernel.org> | |||
 |
index : linux/linux-stable.git | |
| Linux kernel stable tree | kernel.org maintainers |
| summaryrefslogtreecommitdiff |