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path: root/drivers/gpu/drm/nouveau/nvkm/engine/gr/gm200.c
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2022-11-09drm/nouveau/gr/gv100-: port smid mapping code from nvgpuBen Skeggs
Essentially ripped verbatim from NVGPU, comments and all, and adapted to nvkm's structs and style. - maybe fixes an nvgpu bug though, a small tweak was needed to match RM v2: - remove unnecessary WARN_ON Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com>
2022-11-09drm/nouveau/gr/gf100-: move some init to init_exception2()Ben Skeggs
Ampere. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com>
2022-11-09drm/nouveau/gr/gf100-: move some init to init_rop_exceptions()Ben Skeggs
Ampere. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com>
2022-11-09drm/nouveau/gr/gf100-: move reset during golden ctx init to fecs_reset()Ben Skeggs
Ampere. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com>
2022-07-13drm/nouveau/nvkm: remove unused headerBen Skeggs
Left-over from secboot->acr transition. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2021-02-11drm/nouveau/gr: switch to instanced constructorBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24drm/nouveau/gr/gm200-: explicitly handle nofwBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-01-15drm/nouveau/acr: implement new subdev to replace "secure boot"Ben Skeggs
ACR is responsible for managing the firmware for LS (Low Secure) falcons, this was previously handled in the driver by SECBOOT. This rewrite started from some test code that attempted to replicate the procedure RM uses in order to debug early Turing ACR firmwares that were provided by NVIDIA for development. Compared with SECBOOT, the code is structured into more individual steps, with the aim of making the process easier to follow/debug, whilst making it possible to support newer firmware versions that may have a different binary format or API interface. The HS (High Secure) binary(s) are now booted earlier in device init, to match the behaviour of RM, whereas SECBOOT would delay this until we try to boot the first LS falcon. There's also additional debugging features available, with the intention of making it easier to solve issues during FW/HW bring-up in the future. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-01-15drm/nouveau/gr/gf100-: initialise SW state for falcon from constructorBen Skeggs
This will allow us to register the falcon with ACR, and further customise its behaviour by providing the nvkm_falcon_func structure directly. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-01-15drm/nouveau/gr/gf100-: select implementation based on available FWBen Skeggs
This will allow for further customisation of the subdev depending on what firmware is available. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-01-15drm/nouveau/gr/gf100-: move fecs/gpccs ucode into their substructuresBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-01-15drm/nouveau/gr/gk20a,gm200-: use nvkm_firmware_load_blob for sw initBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/gr/gp100-: use correct registers for zbc colour/depth setupBen Skeggs
These were missed the first time around due to the driver version I traced using the older registers still. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/gr/gf100-: calculate and use sm mapping tableBen Skeggs
There's a number of places that require this data, so let's separate out the calculations to ensure they remain consistent. This is incorrect for GM200 and newer, but will produce the same results as we did before. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/gr/gf100-: port tile mapping calculations from NVGPUBen Skeggs
There's also a couple of hardcoded tables for a couple of very specific configurations that NVGPU's algorithm didn't work for. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/gr/gf100-: virtualise trap_mpBen Skeggs
Required to support Volta. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/gr/gf100-: virtualise tpc_mask + apply fixes from tracesBen Skeggs
We weren't placing higher TPC IDs in the right place on some configurations. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/gr/gf100-: delete duplicated init codeBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/gr/gf100-: virtualise init_400054Ben Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/gr/gf100-: virtualise init_shader_exceptionsBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/gr/gf100-: virtualise init_504430Ben Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/gr/gf100-: virtualise init_tex_hww_esrBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/gr/gf100-: virtualise init_419cc0 + apply fixes from tracesBen Skeggs
Pulled some init out of main per-GPC/TPC loops to match RM. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/gr/gf100-: virtualise init_sked_hww_esrBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/gr/gf100-: virtualise init_ds_hww_esr_2Ben Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/gr/gf100-: virtualise init_fecs_exceptions + apply fixes from tracesBen Skeggs
The value for GF100 has changed here, but it matches RM now. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/gr/gf100-: virtualise init_num_active_ltcsBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/gr/gf100-: virtualise init_zcullBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/gr/gf100-: virtualise init_vsc_stream_masterBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/gr/gf100-: virtualise init_biosBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14drm/nouveau/gr/gp100: initial supportBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/gr/gk104-: share implementation of ppc exception initBen Skeggs
This was really inconsistent, some implementations could touch PPCs that didn't exist, others neglected to touch ones that did. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/gr/gk104-: move rop_active_fbps init to nonctxBen Skeggs
Matches newer RM. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/fb/gm200: setup mmu debug buffer registers at init()Ben Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/fb/gf100-: allocate mmu debug buffersBen Skeggs
Later chipsets require setting this up both in FB and GR, so let's just move the allocation to FB. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/gr/gm200-: rop count == ltc countBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/gr/gm200: modify the mask when copying mmu settings from fbBen Skeggs
Appears to more closely match what RM does. For GM20B, now also copying bit 12 from NV_PFB_MMU_CTRL as upcoming changes will require it. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/gr/gm200: move some code into init_gpc_mmu() hookBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/gr/gf100-: abstract fetching rop countBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/gr/gf100-: rename magic_not_rop_nr to screen_tile_row_offsetBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-03-14drm/nouveau/gr/gm200: switch over to using sw_nonctx from firmwareBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-03-14drm/nouveau/secboot/gm200: add secure-boot supportAlexandre Courbot
Add secure-boot for the dGPU set of GM20X chips, using the PMU as the high-secure falcon. This work is based on Deepak Goyal's initial port of Secure Boot to Nouveau. v2. use proper memory target function Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-03-14drm/nouveau/gr/gm200: do not load firmware for secure falconsAlexandre Courbot
Secure falcons' firmware is managed by secboot. Do not load it in GR for them. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-03-14drm/nouveau/gr/gm200: load external firmware and bundlesAlexandre Courbot
Load firmware and bundles in GM200's constructor. The previously called GF100 function did not care about the bundles. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-03-14drm/nouveau/gr/gm200: s/gm204/gm200/Ben Skeggs
Most of the per-chipset differences will go away when we fully switch to using the register lists provided by the firmware files, which will leave all the remaining code "belonging" to GM200. This is a preemptive rename from GM204 to GM200. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
generated by cgit v1.2.3 (git 2.39.1) at 2025-08-02 08:26:21 +0000