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path: root/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c
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2025-07-04drm/msm/dsi/phy: Add support for SM8750Krzysztof Kozlowski
Add support for DSI PHY v7.0 on Qualcomm SM8750 SoC which comes with an incompatible hardware interface change: ICODE_ACCUM_STATUS_LOW and ALOG_OBSV_BUS_STATUS_1 registers - their offsets were just switched. Currently these registers are not used in the driver, so the easiest is to document both but keep them commented out to avoid conflict. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/659616/ Link: https://lore.kernel.org/r/20250618-b4-sm8750-display-v7-6-a591c609743d@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2025-05-02drm/msm/dsi: add DSI PHY configuration on SA8775PAyushi Makhija
The SA8775P SoC uses the 5nm (v4.2) DSI PHY driver with different enable regulator load. Signed-off-by: Ayushi Makhija <quic_amakhija@quicinc.com> Reviewed-by: Dmitry Baryshkov <lumag@kernel.org> Patchwork: https://patchwork.freedesktop.org/patch/649842/ Link: https://lore.kernel.org/r/20250424062431.2040692-5-quic_amakhija@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2025-05-02drm/msm/dsi/phy: add configuration for SAR2130PDmitry Baryshkov
Qualcomm SAR2130P requires slightly different setup for the DSI PHY. It is a 5nm PHY (like SM8450), so supplies are the same, but the rest of the configuration is the same as SM8550 DSI PHY. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Jessica Zhang <quic_jesszhan@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/649257/ Link: https://lore.kernel.org/r/20250418-sar2130p-display-v5-7-442c905cb3a4@oss.qualcomm.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2024-12-15drm/msm/dsi: Add dsi phy support for SM6150Li Liu
Add phy configuration for SM6150 Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Li Liu <quic_lliu6@quicinc.com> Signed-off-by: Fange Zhang <quic_fangez@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/628009/ Link: https://lore.kernel.org/r/20241210-add-display-support-for-qcs615-platform-v4-6-2d875a67602d@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2024-06-25drm/msm/dsi: Add phy configuration for MSM8937Daniil Titov
Add phy configuration for 28nm dsi phy found on MSM8937 SoC. Only difference from existing msm8916 configuration is number of phy and io_start addresses. Signed-off-by: Daniil Titov <daniilt971@gmail.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Barnabás Czémán <trabarni@gmail.com> Patchwork: https://patchwork.freedesktop.org/patch/600518/ Link: https://lore.kernel.org/r/20240623-dsi-v2-4-a0ca70fb4846@gmail.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-12-05drm/msm: dsi: add support for DSI-PHY on SM8650Neil Armstrong
Add DSI PHY support for the SM8650 platform. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/564976/ Link: https://lore.kernel.org/r/20231030-topic-sm8650-upstream-mdss-v2-7-43f1887c82b8@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-12-03drm/msm/dsi: Enable runtime PMKonrad Dybcio
Some devices power the DSI PHY/PLL through a power rail that we model as a GENPD. Enable runtime PM to make it suspendable. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/543352/ Link: https://lore.kernel.org/r/20230620-topic-dsiphy_rpm-v2-2-a11a751f34f0@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-12-03drm/msm/dsi: Use pm_runtime_resume_and_get to prevent refcnt leaksKonrad Dybcio
This helper has been introduced to avoid programmer errors (missing _put calls leading to dangling refcnt) when using pm_runtime_get, use it. While at it, start checking the return value. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Fixes: 5c8290284402 ("drm/msm/dsi: Split PHY drivers to separate files") Patchwork: https://patchwork.freedesktop.org/patch/543350/ Link: https://lore.kernel.org/r/20230620-topic-dsiphy_rpm-v2-1-a11a751f34f0@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-07-27drm/msm/dsi: Reuse QCM2290 14nm DSI PHY configuration for SM6125Marijn Suijten
SM6125 features only a single PHY (despite a secondary PHY PLL source being available to the disp_cc_mdss_pclk0_clk_src clock), and downstream sources for this "trinket" SoC do not define the typical "vcca" regulator to be available nor used. This, including the register offset is identical to QCM2290, whose config struct can trivially be reused. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Patchwork: https://patchwork.freedesktop.org/patch/548980/ Link: https://lore.kernel.org/r/20230723-sm6125-dpu-v4-13-a3f287dd6c07@somainline.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-06-04drm/msm/dsi: Add phy configuration for MSM8226Luca Weiss
MSM8226 uses a modified PLL lock sequence compared to MSM8974, which is based on the function dsi_pll_enable_seq_m in the msm-3.10 kernel. Worth noting that the msm-3.10 downstream kernel also will try other sequences in case this one doesn't work, but during testing it has shown that the _m sequence succeeds first time also: .pll_enable_seqs[0] = dsi_pll_enable_seq_m, .pll_enable_seqs[1] = dsi_pll_enable_seq_m, .pll_enable_seqs[2] = dsi_pll_enable_seq_d, .pll_enable_seqs[3] = dsi_pll_enable_seq_d, .pll_enable_seqs[4] = dsi_pll_enable_seq_f1, .pll_enable_seqs[5] = dsi_pll_enable_seq_c, .pll_enable_seqs[6] = dsi_pll_enable_seq_e, We may need to expand this in the future. Signed-off-by: Luca Weiss <luca@z3ntu.xyz> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/540618/ Link: https://lore.kernel.org/r/20230308-msm8226-mdp-v3-6-b6284145d67a@z3ntu.xyz Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-01-22drm/msm/dsi: correct byte intf clock rate for 14nm DSI PHYDmitry Baryshkov
According to the vendor kernel, byte intf clock rate should be a half of the byte clock only when DSI PHY version is above 2.0 (in other words, 10nm PHYs and later) and only if PHY is used in D-PHY mode. Currently MSM DSI code handles only the second part of the clause (C-PHY vs D-PHY), skipping DSI PHY version check, which causes issues on some of 14nm DSI PHY platforms (e.g. qcm2290). Move divisor selection to DSI PHY code, pass selected divisor through shared timings and set byte intf clock rate accordingly. Cc: Loic Poulain <loic.poulain@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Tested-by: Konrad Dybcio <konrad.dybcio@linaro.org> # SM6115P J606F Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/519006/ Link: https://lore.kernel.org/r/20230118130027.2345719-1-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-01-22drm/msm/dsi: Add phy configuration for SM6375Konrad Dybcio
SM6375 uses a boring standard 7nm PHY. Add a configuration entry for it. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/518511/ Link: https://lore.kernel.org/r/20230116114059.346327-2-konrad.dybcio@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-01-22drm/msm/dsi: add support for DSI-PHY on SM8550Neil Armstrong
SM8550 use a 4nm DSI PHYs, which share register definitions with 7nm DSI PHYs. Rather than duplicating the driver, handle 4nm variant inside the common 5+7nm driver. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/517515/ Link: https://lore.kernel.org/r/20230103-topic-sm8550-upstream-mdss-dsi-v3-6-660c3bcb127f@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-01-22drm/msm/dsi: add support for DSI-PHY on SM8350 and SM8450Dmitry Baryshkov
SM8350 and SM8450 use 5nm DSI PHYs, which share register definitions with 7nm DSI PHYs. Rather than duplicating the driver, handle 5nm variants inside the common 5+7nm driver. Co-developed-by: Robert Foss <robert.foss@linaro.org> Signed-off-by: Robert Foss <robert.foss@linaro.org> Tested-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/514230/ Link: https://lore.kernel.org/r/20221207012231.112059-7-dmitry.baryshkov@linaro.org [DB: changed compatibles per Krzysztof's request] Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2022-11-04drm/msm/dsi: Add phy configuration for QCM2290Loic Poulain
The QCM2290 SoC a the 14nm (V2.0) single DSI phy. The platform is not fully compatible with the standard 14nm PHY, so it requires a separate compatible and config entry. Signed-off-by: Loic Poulain <loic.poulain@linaro.org> [DB: rebased and updated commit msg] Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Patchwork: https://patchwork.freedesktop.org/patch/504578/ Link: https://lore.kernel.org/r/20220924121900.222711-3-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2022-09-18drm/msm/dsi: Improve dsi_phy_driver_probe() probe error handlingDouglas Anderson
The dsi_phy_driver_probe() function has a "goto fail" for no reason. Change it to just always return directly when it sees an error. Make this simpler by leveraging dev_err_probe() which is designed to make code like this shorter / simpler. NOTE: as part of this, we now pass through error codes directly from msm_ioremap_size() rather than translating to -ENOMEM. This changed mostly because it's much more convenient when using dev_err_probe() and also it's usually encouraged not to hide error codes like the old code was doing unless there is a good reason. I can't see any reason why we'd need to return -ENOMEM instead of -EINVAL from the probe function. Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/496324/ Link: https://lore.kernel.org/r/20220804073608.v4.6.I969118a35934a0e5007fe4f80e3e28e9c0b7602a@changeid Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2022-09-18drm/msm/dsi: Take advantage of devm_regulator_bulk_get_const()Douglas Anderson
As of the commit 1de452a0edda ("regulator: core: Allow drivers to define their init data as const") we no longer need to do copying of regulator bulk data from initdata to something dynamic. Let's take advantage of that. In addition to saving some code, this also moves us to using ARRAY_SIZE() to specify how many regulators we have which is less error prone. This gets rid of some layers of wrappers which makes it obvious that we can get rid of an extra error print. devm_regulator_bulk_get_const() prints errors for you so you don't need an extra layer of printing. In all cases here I have preserved the old settings without any investigation about whether the loads being set are sensible. In the cases of some of the PHYs if several PHYs in the same file used exactly the same settings I had them point to the same data structure. NOTE: Though I haven't done the math, this is likely an overall savings in terms of "static const" data. We previously always allocated space for 8 supplies. Each of these supplies took up 36 bytes of data (32 for name, 4 for an int). Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/496325/ Link: https://lore.kernel.org/r/20220804073608.v4.5.I55a9e65cb1c22221316629e98768ff473f47a067@changeid Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2022-09-18drm/msm/dsi: Use the new regulator bulk feature to specify the loadDouglas Anderson
As of commit 6eabfc018e8d ("regulator: core: Allow specifying an initial load w/ the bulk API") we can now specify the initial load in the bulk data rather than having to manually call regulator_set_load() on each regulator. Let's use it. Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/496319/ Link: https://lore.kernel.org/r/20220804073608.v4.4.I7b3c72949883846badb073cfeae985c55239da1d@changeid Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2022-09-18drm/msm/dsi: Don't set a load before disabling a regulatorDouglas Anderson
As of commit 5451781dadf8 ("regulator: core: Only count load for enabled consumers"), a load isn't counted for a disabled regulator. That means all the code in the DSI driver to specify and set loads before disabling a regulator is not actually doing anything useful. Let's remove it. It should be noted that all of the loads set that were being specified were pointless noise anyway. The only use for this number is to pick between low power and high power modes of regulators. Regulators appear to do this changeover at loads on the order of 10000 uA. You would need a lot of clients of the same rail for that 100 uA number to count for anything. Note that now that we get rid of the setting of the load at disable time, we can just set the load once when we first get the regulator and then forget it. It should also be noted that the regulator functions regulator_bulk_enable() and regulator_set_load() already print error messages when they encounter problems so while moving things around we get rid of some extra error prints. Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/496320/ Link: https://lore.kernel.org/r/20220804073608.v4.3.If1f94fbbdb7c1d0fb3961de61483a851ad1971a7@changeid Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2022-09-18drm/msm/dsi: fix the inconsistent indentingsunliming
Fix the inconsistent indenting in function msm_dsi_dphy_timing_calc_v3(). Fix the following smatch warnings: drivers/gpu/drm/msm/dsi/phy/dsi_phy.c:350 msm_dsi_dphy_timing_calc_v3() warn: inconsistent indenting Fixes: f1fa7ff44056 ("drm/msm/dsi: implement auto PHY timing calculator for 10nm PHY") Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: sunliming <sunliming@kylinos.cn> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/494662/ Link: https://lore.kernel.org/r/20220719015622.646718-1-sunliming@kylinos.cn Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Rob Clark <robdclark@chromium.org>
2022-02-19Merge branches 'msm-next-lumag-core', 'msm-next-lumag-dpu', ↵Dmitry Baryshkov
'msm-next-lumag-dp', 'msm-next-lumag-dsi', 'msm-next-lumag-hdmi' and 'msm-next-lumag-mdp5' into msm-next-lumag
2022-02-18drm/msm/dsi: Add dsi phy tuning configuration supportRajeev Nandan
Add support for MSM DSI PHY tuning configuration. Current design is to support drive strength and drive level/amplitude tuning for 10nm PHY version, but this can be extended to other PHY versions. Signed-off-by: Rajeev Nandan <quic_rajeevny@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/1643573719-32095-3-git-send-email-quic_rajeevny@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2022-02-18drm/msm: drop dbgname argument from msm_ioremap*()Dmitry Baryshkov
msm_ioremap() functions take additional argument dbgname which is now unused. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/20220105232700.444170-2-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2022-01-25drm/msm/dsi: invalid parameter check in msm_dsi_phy_enableJosé Expósito
The function performs a check on the "phy" input parameter, however, it is used before the check. Initialize the "dev" variable after the sanity check to avoid a possible NULL pointer dereference. Fixes: 5c8290284402b ("drm/msm/dsi: Split PHY drivers to separate files") Addresses-Coverity-ID: 1493860 ("Null pointer dereference") Signed-off-by: José Expósito <jose.exposito89@gmail.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20220116181844.7400-1-jose.exposito89@gmail.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2021-12-16drm/msm: Don't use autosuspend for displayRob Clark
No functional change, as we only actually enable autosuspend for the GPU device. But lets not encourage thinking that autosuspend is a good idea for anything display related. Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20211215175910.1744151-1-robdclark@gmail.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2021-11-28drm/msm/dsi: stop setting clock parents manuallyDmitry Baryshkov
There is no reason to set clock parents manually, use device tree to assign DSI/display clock parents to DSI PHY clocks. Dropping this manual setup allows us to drop repeating code and to move registration of hw clock providers to generic place. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org> Link: https://lore.kernel.org/r/20211006204828.1218225-2-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2021-10-15drm/msm/dsi: Add phy configuration for MSM8953Vladimir Lypak
Add phy configuration for 14nm dsi phy found on MSM8953 SoC. Only difference from existing configurations are io_start addresses. Signed-off-by: Vladimir Lypak <vladimir.lypak@gmail.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Sireesh Kodali <sireeshkodali1@gmail.com> Link: https://lore.kernel.org/r/20210928131929.18567-3-sireeshkodali1@gmail.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2021-08-10drm/msm/dsi: add continuous clock support for 7nm PHYDmitry Baryshkov
Unlike previous generations, 7nm PHYs are required to collaborate with the host for continuos clock mode. Add changes neccessary to enable continuous clock mode in the 7nm DSI PHYs. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20210805170817.3337665-1-dmitry.baryshkov@linaro.org [Fix merge conflict, and $description typo] Signed-off-by: Rob Clark <robdclark@chromium.org>
2021-08-07drm/msm/dsi: Add PHY configuration for SC7280Rajeev Nandan
The SC7280 SoC uses the 7nm (V4.1) DSI PHY driver with different enable|disable regulator loads. Signed-off-by: Rajeev Nandan <rajeevny@codeaurora.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/1624365748-24224-3-git-send-email-rajeevny@codeaurora.org Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2021-08-07drm/msm/dsi: drop msm_dsi_phy_get_shared_timingsDmitry Baryshkov
Instead of fetching shared timing through an extra function call, get them directly from msm_dsi_phy_enable. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org> Link: https://lore.kernel.org/r/20210709210729.953114-9-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2021-08-07drm/msm/dsi: phy: use of_device_get_match_dataDmitry Baryshkov
Use of_device_get_match-data() instead of of_match_node(). Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org> Link: https://lore.kernel.org/r/20210709210729.953114-8-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2021-08-07drm/msm/dsi: support CPHY mode for 7nm pll/phyJonathan Marek
Add the required changes to support 7nm pll/phy in CPHY mode. This adds a "qcom,dsi-phy-cphy-mode" property for the PHY node to enable the CPHY mode. Signed-off-by: Jonathan Marek <jonathan@marek.ca> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20210617144349.28448-4-jonathan@marek.ca Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2021-06-23drm/msm/dsi: add DSI PHY registers to snapshot dataDmitry Baryshkov
Add DSI PHY registers to the msm state snapshots to be able to check their contents. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org> Link: https://lore.kernel.org/r/20210427001828.2375555-5-dmitry.baryshkov@linaro.org Signed-off-by: Rob Clark <robdclark@chromium.org>
2021-04-27drm/msm/dsi: fix msm_dsi_phy_get_clk_provider return codeDmitry Baryshkov
msm_dsi_phy_get_clk_provider() always returns two provided clocks, so return 0 instead of returning incorrect -EINVAL error code. Fixes: 5d13459650b3 ("drm/msm/dsi: push provided clocks handling into a generic code") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org> Tested-by: Jonathan Marek <jonathan@marek.ca> Link: https://lore.kernel.org/r/20210412000158.2049066-1-dmitry.baryshkov@linaro.org Signed-off-by: Rob Clark <robdclark@chromium.org>
2021-04-07drm/msm/dsi: stop passing src_pll_id to the phy_enable callDmitry Baryshkov
Phy driver already knows the source PLL id basing on the set usecase and the current PLL id. Stop passing it to the phy_enable call. As a reminder, dsi manager will always use DSI 0 as a clock master in a slave mode, so PLL 0 is always a clocksource for DSI 0 and it is always a clocksource for DSI 1 too unless DSI 1 is used in the standalone mode. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Tested-by: Stephen Boyd <swboyd@chromium.org> # on sc7180 lazor Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org> Link: https://lore.kernel.org/r/20210331105735.3690009-25-dmitry.baryshkov@linaro.org Signed-off-by: Rob Clark <robdclark@chromium.org>
2021-04-07drm/msm/dsi: inline msm_dsi_phy_set_src_pllDmitry Baryshkov
The src_truthtable config is not used for some of phys, which use other means of configuring the master/slave usecases. Inline this function with the goal of removing src_pll_id argument in the next commit. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Tested-by: Stephen Boyd <swboyd@chromium.org> # on sc7180 lazor Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org> Link: https://lore.kernel.org/r/20210331105735.3690009-24-dmitry.baryshkov@linaro.org Signed-off-by: Rob Clark <robdclark@chromium.org>
2021-04-07drm/msm/dsi: move ioremaps to dsi_phy_driver_probeDmitry Baryshkov
All PHY drivers would map dsi_pll area. Some PHY drivers would also map dsi_phy area again (a leftover from old PHY/PLL separation). Move all ioremaps to the common dsi_phy driver code and drop individual ioremapped areas from PHY drivers. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org> Tested-by: Stephen Boyd <swboyd@chromium.org> # on sc7180 lazor Link: https://lore.kernel.org/r/20210331105735.3690009-21-dmitry.baryshkov@linaro.org Signed-off-by: Rob Clark <robdclark@chromium.org>
2021-04-07drm/msm/dsi: make save_state/restore_state callbacks accept msm_dsi_phyDmitry Baryshkov
Make save_state/restore callbacks accept struct msm_dsi_phy rather than struct msm_dsi_pll. This moves them to struct msm_dsi_phy_ops, allowing us to drop struct msm_dsi_pll_ops. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Tested-by: Stephen Boyd <swboyd@chromium.org> # on sc7180 lazor Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org> Link: https://lore.kernel.org/r/20210331105735.3690009-18-dmitry.baryshkov@linaro.org Signed-off-by: Rob Clark <robdclark@chromium.org>
2021-04-07drm/msm/dsi: make save/restore_state phy-level functionsDmitry Baryshkov
Morph msm_dsi_pll_save/restore_state() into msm_dsi_phy_save/restore_state(), thus removing last bits of knowledge about msm_dsi_pll from dsi_manager. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org> Tested-by: Stephen Boyd <swboyd@chromium.org> # on sc7180 lazor Link: https://lore.kernel.org/r/20210331105735.3690009-14-dmitry.baryshkov@linaro.org Signed-off-by: Rob Clark <robdclark@chromium.org>
2021-04-07drm/msm/dsi: use devm_of_clk_add_hw_providerDmitry Baryshkov
Use devm_of_clk_add_hw_provider() to register provided clocks. This allows dropping the remove function alltogether. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org> Tested-by: Stephen Boyd <swboyd@chromium.org> # on sc7180 lazor Link: https://lore.kernel.org/r/20210331105735.3690009-13-dmitry.baryshkov@linaro.org Signed-off-by: Rob Clark <robdclark@chromium.org>
2021-04-07drm/msm/dsi: use devm_clk_*register to registe DSI PHY clocksDmitry Baryshkov
Use devres-enabled version of clock registration functions. This lets us remove dsi_pll destroy callbacks completely. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org> Tested-by: Stephen Boyd <swboyd@chromium.org> # on sc7180 lazor Link: https://lore.kernel.org/r/20210331105735.3690009-12-dmitry.baryshkov@linaro.org Signed-off-by: Rob Clark <robdclark@chromium.org>
2021-04-07drm/msm/dsi: push provided clocks handling into a generic codeDmitry Baryshkov
All MSM DSI PHYs provide two clocks: byte and pixel ones. Register/unregister provided clocks from the generic place, removing boilerplate code from all MSM DSI PHY drivers. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org> Tested-by: Stephen Boyd <swboyd@chromium.org> # on sc7180 lazor Link: https://lore.kernel.org/r/20210331105735.3690009-11-dmitry.baryshkov@linaro.org Signed-off-by: Rob Clark <robdclark@chromium.org>
2021-04-07drm/msm/dsi: move all PLL callbacks into PHY config structDmitry Baryshkov
Move all PLL-related callbacks into struct msm_dsi_phy_cfg. This limits the amount of data in the struct msm_dsi_pll. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org> Tested-by: Stephen Boyd <swboyd@chromium.org> # on sc7180 lazor Link: https://lore.kernel.org/r/20210331105735.3690009-7-dmitry.baryshkov@linaro.org Signed-off-by: Rob Clark <robdclark@chromium.org>
2021-04-07drm/msm/dsi: replace PHY's init callback with configurable dataDmitry Baryshkov
DSI PHY init callback would either map dsi_phy_regulator or dsi_phy_lane depending on the PHY type. Replace those callbacks with configuration options governing mapping those regions. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org> Tested-by: Stephen Boyd <swboyd@chromium.org> # on sc7180 lazor Link: https://lore.kernel.org/r/20210331105735.3690009-4-dmitry.baryshkov@linaro.org Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-09-12drm/msm/dsi: add support for 7nm DSI PHY/PLLJonathan Marek
This adds support for the 7nm ("V4") DSI PHY/PLL for sm8150 and sm8250. Implementation is based on 10nm driver, but updated based on the downstream 7nm driver. Signed-off-by: Jonathan Marek <jonathan@marek.ca> Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> (SM8250) Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-07-31drm/msm/dsi: Add phy configuration for SDM630/636/660Konrad Dybcio
These SoCs make use of the 14nm phy, but at different addresses than other 14nm units. Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-02-13drm/msm/dsi: save pll state before dsi host is powered offHarigovindan P
Save pll state before dsi host is powered off. Without this change some register values gets resetted. Signed-off-by: Harigovindan P <harigovi@codeaurora.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-11-04drm/msm/dsi: Add configuration for 28nm PLL on family BAngeloGioacchino Del Regno
The 28nm PLL has a different iospace on MSM/APQ family B SoCs: add a new configuration and use it when the DT reports the "qcom,dsi-phy-28nm-hpm-fam-b" compatible. Signed-off-by: AngeloGioacchino Del Regno <kholk11@gmail.com> Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-10-10drm/msm/dsi: Remove set but not used variable 'lpx'zhengbin
Fixes gcc '-Wunused-but-set-variable' warning: drivers/gpu/drm/msm/dsi/phy/dsi_phy.c: In function msm_dsi_dphy_timing_calc_v2: drivers/gpu/drm/msm/dsi/phy/dsi_phy.c:156:17: warning: variable lpx set but not used [-Wunused-but-set-variable] drivers/gpu/drm/msm/dsi/phy/dsi_phy.c: In function msm_dsi_dphy_timing_calc_v3: drivers/gpu/drm/msm/dsi/phy/dsi_phy.c:273:17: warning: variable lpx set but not used [-Wunused-but-set-variable] 'lpx' in msm_dsi_dphy_timing_calc_v2 is not used since commit a4df68fa232e ("drm/msm/dsi: Add new method to calculate 14nm PHY timings") 'lpx' in msm_dsi_dphy_timing_calc_v3 is not used since commit f1fa7ff44056 ("drm/msm/dsi: implement auto PHY timing calculator for 10nm PHY") Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: zhengbin <zhengbin13@huawei.com> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: https://patchwork.freedesktop.org/patch/msgid/1570690506-83287-4-git-send-email-zhengbin13@huawei.com
2019-09-03drm/msm/phy/dsi_phy: silence -EPROBE_DEFER warningsBrian Masney
The following errors show up when booting the Nexus 5: msm_dsi_phy fd922a00.dsi-phy: [drm:dsi_phy_driver_probe] *ERROR* dsi_phy_regulator_init: failed to init regulator, ret=-517 msm_dsi_phy fd922a00.dsi-phy: [drm:dsi_phy_driver_probe] *ERROR* dsi_phy_driver_probe: failed to init regulator dsi_phy_regulator_init() already logs the error, so no need to log the same error a second time in dsi_phy_driver_probe(). This patch also changes dsi_phy_regulator_init() to not log the error if the error code is -EPROBE_DEFER to reduce noise in dmesg. Signed-off-by: Brian Masney <masneyb@onstation.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> [add some {}'s] Signed-off-by: Rob Clark <robdclark@chromium.org>
generated by cgit v1.2.3 (git 2.39.1) at 2025-08-02 23:32:43 +0000