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path: root/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
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2025-07-05drm/msm: make it possible to disable KMS-related code.Dmitry Baryshkov
If the Adreno device is used in a headless mode, there is no need to build all KMS components. Build corresponding parts conditionally, only selecting them if modeset support is actually required. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/662581/ Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com>
2025-07-04drm/msm/dpu: Implement LM crossbar for v12.0 DPUKrzysztof Kozlowski
v12.0 DPU on SM8750 comes with new LM crossbar that requires each pipe rectangle to be programmed separately in blend stage. Implement support for this along with a new CTL_LAYER_ACTIVE register and setting the blend stage in layer mixer code. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/659632/ Link: https://lore.kernel.org/r/20250618-b4-sm8750-display-v7-12-a591c609743d@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2025-07-04drm/msm/dpu: Implement CTL_PIPE_ACTIVE for v12.0 DPUKrzysztof Kozlowski
v12.0 DPU on SM8750 comes with new CTL_PIPE_ACTIVE register for selective activation of pipes, which replaces earlier dpu_hw_ctl_setup_blendstage() code path for newer devices. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/659630/ Link: https://lore.kernel.org/r/20250618-b4-sm8750-display-v7-11-a591c609743d@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2025-07-04drm/msm/dpu: Implement 10-bit color alpha for v12.0 DPUKrzysztof Kozlowski
v12.0 DPU on SM8750 comes with 10-bit color alpha. Add register differences and new implementations of setup_alpha_out(), setup_border_color() and setup_blend_config(). Notable changes in v6: Correct fg_alpha shift on new DPU, pointed out by Abel Vesas. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/659629/ Link: https://lore.kernel.org/r/20250618-b4-sm8750-display-v7-10-a591c609743d@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2025-07-04drm/msm/dpu: Consistently use u32 instead of uint32_tKrzysztof Kozlowski
Linux coding style asks to use kernel types like u32 instead of uint32_t and code already has it in other places, so unify the remaining pieces. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/659623/ Link: https://lore.kernel.org/r/20250618-b4-sm8750-display-v7-9-a591c609743d@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2025-05-12drm/msm/dpu: Clear CTL_FETCH_PIPE_ACTIVE before blend setupKrzysztof Kozlowski
Before blend setup, all existing blend stages are cleared, so shall be active fetch pipes. Fixes: b3652e87c03c ("drm/msm/disp/dpu1: add support to program fetch active in ctl path") Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/651263/ Link: https://lore.kernel.org/r/20250430-b4-sm8750-display-v5-10-8cab30c3e4df@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2025-05-12drm/msm/dpu: Add missing "fetch" name to set_active_pipes()Krzysztof Kozlowski
The set_active_pipes() callback configures CTL_FETCH_PIPE_ACTIVE and newer DPU v12.0 comes with CTL_PIPE_ACTIVE, thus rename it to set_active_fetch_pipes() to better match the purpose. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Jessica Zhang <quic_jesszhan@quicinc.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/651261/ Link: https://lore.kernel.org/r/20250430-b4-sm8750-display-v5-7-8cab30c3e4df@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2025-03-08drm/msm/dpu: Fix uninitialized variable in dpu_crtc_kickoff_clone_mode()Dan Carpenter
After the loop there is a check for whether "wb_encoder" has been set to non-NULL, however it was never set to NULL. Initialize it to NULL. Fixes: ad06972d5365 ("drm/msm/dpu: Reorder encoder kickoff for CWB") Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/641631/ Link: https://lore.kernel.org/r/f8ba03dc-0f90-4781-8d54-c16b3251ecb1@stanley.mountain Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2025-03-08drm/msm/dpu: correct dpu_crtc_check_mode_changed docsDmitry Baryshkov
Correct commit 20972609d12c ("drm/msm/dpu: Require modeset if clone mode status changes") and describe old_crtc_state and new_crtc_state params instead of the single previously used parameter crtc_state. Fixes: 20972609d12c ("drm/msm/dpu: Require modeset if clone mode status changes") Signed-off-by: Dmitry Baryshkov <lumag@kernel.org> Reviewed-by: Rob Clark <robdclark@gmail.com> Patchwork: https://patchwork.freedesktop.org/patch/641313/ Link: https://lore.kernel.org/r/20250306-dpu-fix-docs-v1-1-e51b71e8ad84@kernel.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2025-03-05drm/msm/dpu: also use KBps for bw_ctl outputDmitry Baryshkov
Change debugfs and log entries to use KBps / u32 for bw_ctl and similar data. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/636066/ Link: https://lore.kernel.org/r/20250209-dpu-perf-rework-v5-5-87e936cf3004@linaro.org
2025-03-05drm/msm/dpu: change ib values to u32Dmitry Baryshkov
The IB values in core_perf calculations (max_per_pipe_ib, fix_core_ib_vote) are expressed in KBps and are passed to icc_set_bw without additional division. Change type of those values to u32. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/636061/ Link: https://lore.kernel.org/r/20250209-dpu-perf-rework-v5-3-87e936cf3004@linaro.org
2025-03-05drm/msm/dpu: Reorder encoder kickoff for CWBJessica Zhang
Add a helper that will handle the correct order of the encoder kickoffs for concurrent writeback. For concurrent writeback, the realtime encoder must always kickoff last as it will call the trigger flush and start. This avoids the following scenario where the writeback encoder increments the pending kickoff count after the WB_DONE interrupt is fired: If the realtime encoder is kicked off first, the encoder kickoff will flush/start the encoder and increment the pending kickoff count. The WB_DONE interrupt then fires (before the writeback encoder is kicked off). When the writeback encoder enters its kickoff, it will skip the flush/start (due to CWB being enabled) and hit a frame done timeout as the frame was kicked off (and the WB_DONE interrupt fired) without the pending kickoff count being incremented. In addition, the writeback timer should only start after the realtime encoder is kicked off to ensure that we don't get timeouts when the system has a heavy load (ex. when debug logs are enabled) Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/637491/ Link: https://lore.kernel.org/r/20250214-concurrent-wb-v6-13-a44c293cf422@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2025-03-05drm/msm/dpu: Start frame done timer after encoder kickoffJessica Zhang
Starting the frame done timer before the encoder is finished kicking off can lead to unnecessary frame done timeouts when the device is experiencing heavy load (ex. when debug logs are enabled). Thus, create a separate API for starting the encoder frame done timer and call it after the encoder kickoff is finished Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/637502/ Link: https://lore.kernel.org/r/20250214-concurrent-wb-v6-11-a44c293cf422@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2025-03-05drm/msm/dpu: Require modeset if clone mode status changesJessica Zhang
If the clone mode enabled status is changing, a modeset needs to happen so that the resources can be reassigned Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/637483/ Link: https://lore.kernel.org/r/20250214-concurrent-wb-v6-5-a44c293cf422@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2025-03-05drm/msm/dpu: Add CWB to msm_display_topologyJessica Zhang
Currently, the topology is calculated based on the assumption that the user cannot request real-time and writeback simultaneously. For example, the number of LMs and CTLs are currently based off the number of phys encoders under the assumption there will be at least 1 LM/CTL per phys encoder. This will not hold true for concurrent writeback as both phys encoders (1 real-time and 1 writeback) must be driven by 1 LM/CTL when concurrent writeback is enabled. To account for this, add a cwb_enabled flag and only adjust the number of CTL/LMs needed by a given topology based on the number of phys encoders only if CWB is not enabled. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/637486/ Link: https://lore.kernel.org/r/20250214-concurrent-wb-v6-4-a44c293cf422@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2025-03-05drm/msm/dpu: switch RM to use crtc_id rather than enc_id for allocationDmitry Baryshkov
Up to now the driver has been using encoder to allocate hardware resources. Switch it to use CRTC id in preparation for the next step. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/637503/ Link: https://lore.kernel.org/r/20250214-concurrent-wb-v6-3-a44c293cf422@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2025-03-05drm/msm/dpu: move resource allocation to CRTCDmitry Baryshkov
All resource allocation is centered around the LMs. Then other blocks (except DSCs) are allocated basing on the LMs that was selected, and LM powers up the CRTC rather than the encoder. Moreover if at some point the driver supports encoder cloning, allocating resources from the encoder will be incorrect, as all clones will have different encoder IDs, while LMs are to be shared by these encoders. In addition, move mode_changed() to dpu_crtc as encoder no longer has access to topology information Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> [quic_abhinavk@quicinc.com: Refactored resource allocation for CDM] Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> [quic_jesszhan@quicinc.com: Changed to grabbing exising global state] Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com> [DB: rebased on top of msm-next] [DB: fixed resource allcoation to ignore the active_changed flag] Patchwork: https://patchwork.freedesktop.org/patch/637487/ Link: https://lore.kernel.org/r/20250214-concurrent-wb-v6-2-a44c293cf422@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2025-03-05drm/msm/dpu: fill CRTC resources in dpu_crtc.cDmitry Baryshkov
Stop poking into CRTC state from dpu_encoder.c, fill CRTC HW resources from dpu_crtc_assign_resources(). Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> [quic_abhinavk@quicinc.com: cleaned up formatting] Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/637485/ Link: https://lore.kernel.org/r/20250214-concurrent-wb-v6-1-a44c293cf422@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2025-02-25drm/msm/dpu: don't use active in atomic_check()Dmitry Baryshkov
The driver isn't supposed to consult crtc_state->active/active_check for resource allocation. Instead all resources should be allocated if crtc_state->enabled is set. Stop consulting active / active_changed in order to determine whether the hardware resources should be (re)allocated. Fixes: ccc862b957c6 ("drm/msm/dpu: Fix reservation failures in modeset") Reported-by: Simona Vetter <simona.vetter@ffwll.ch> Closes: https://lore.kernel.org/dri-devel/ZtW_S0j5AEr4g0QW@phenom.ffwll.local/ Reviewed-by: Simona Vetter <simona.vetter@ffwll.ch> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/633393/ Link: https://lore.kernel.org/r/20250123-drm-dirty-modeset-v2-1-bbfd3a6cd1a4@linaro.org
2025-02-15drm/msm/dpu: Drop extraneous return in dpu_crtc_reassign_planes()Jessica Zhang
Drop extra return at the end of dpu_crtc_reassign_planes() Fixes: 774bcfb73176 ("drm/msm/dpu: add support for virtual planes") Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/631565/ Link: https://lore.kernel.org/r/20250108-virtual-planes-fixes-v1-2-420cb36df94a@quicinc.com Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
2024-12-15drm/msm/dpu: add support for virtual planesDmitry Baryshkov
Only several SSPP blocks support such features as YUV output or scaling, thus different DRM planes have different features. Properly utilizing all planes requires the attention of the compositor, who should prefer simpler planes to YUV-supporting ones. Otherwise it is very easy to end up in a situation when all featureful planes are already allocated for simple windows, leaving no spare plane for YUV playback. To solve this problem make all planes virtual. Each plane is registered as if it supports all possible features, but then at the runtime during the atomic_check phase the driver selects backing SSPP block for each plane. As the planes are attached to the CRTC and not the encoder, the SSPP blocks are also allocated per CRTC ID (all other resources are currently allocated per encoder ID). This also matches the hardware requirement, where both rectangles of a single SSPP can only be used with the LM pair. Note, this does not provide support for using two different SSPP blocks for a single plane or using two rectangles of an SSPP to drive two planes. Each plane still gets its own SSPP and can utilize either a solo rectangle or both multirect rectangles depending on the resolution. Note #2: By default support for virtual planes is turned off and the driver still uses old code path with preallocated SSPP block for each plane. To enable virtual planes, pass 'msm.dpu_use_virtual_planes=1' kernel parameter. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/629022/ Link: https://lore.kernel.org/r/20241215-dpu-virtual-wide-v8-1-65221f213ce1@linaro.org
2024-12-15drm/msm/dpu: filter out too wide modes if no 3dmux is presentAbhinav Kumar
On chipsets such as QCS615, there is no 3dmux present. In such a case, a layer exceeding the max_mixer_width cannot be split, hence cannot be supported. Filter out the modes which exceed the max_mixer_width when there is no 3dmux present. Also, add a check in the dpu_crtc_atomic_check() to return failure for such modes. Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Tested-by: Xiangxu Yin <quic_xiangxuy@quicinc.com> # QCS615 Patchwork: https://patchwork.freedesktop.org/patch/627974/ Link: https://lore.kernel.org/r/20241209-no_3dmux-v3-1-48aaa555b0d3@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2024-11-03drm/msm/dpu: rework documentation commentsDmitry Baryshkov
Unfortunately the tooling doesn't check documents placed before funciton prototypes. Such comments frequently become outdated, miss several params, etc. Move documentation for the functions to be placed before the actual function body, allowing 'make W=1' to actually check these comments and report an error. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/622690/ Link: https://lore.kernel.org/r/20241102-dpu-docs-rework-v1-1-d735853fd6db@linaro.org
2024-10-21drm/msm/dpu: sync mode_config limits to the FB limits in dpu_plane.cDmitry Baryshkov
Lift mode_config limits set by the DPU driver to the actual FB limits as handled by the dpu_plane.c. Move 2*max_lm_width check where it belongs, to the drm_crtc_helper_funcs::mode_valid() callback. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Tested-by: Abhinav Kumar <quic_abhinavk@quicinc.com> # sc7280 Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/612259/ Link: https://lore.kernel.org/r/20240903-dpu-mode-config-width-v6-15-617e1ecc4b7a@linaro.org
2024-10-14drm/msm/dpu: check for overflow in _dpu_crtc_setup_lm_bounds()Dmitry Baryshkov
Make _dpu_crtc_setup_lm_bounds() check that CRTC width is not overflowing LM requirements. Rename the function accordingly. Fixes: 25fdd5933e4c ("drm/msm: Add SDM845 DPU support") Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Tested-by: Abhinav Kumar <quic_abhinavk@quicinc.com> # sc7280 Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/612237/ Link: https://lore.kernel.org/r/20240903-dpu-mode-config-width-v6-3-617e1ecc4b7a@linaro.org Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
2024-10-14drm/msm/dpu: move CRTC resource assignment to dpu_encoder_virt_atomic_checkDmitry Baryshkov
Historically CRTC resources (LMs and CTLs) were assigned in dpu_crtc_atomic_begin(). The commit 9222cdd27e82 ("drm/msm/dpu: move hw resource tracking to crtc state") simply moved resources to struct dpu_crtc_state, without changing the code sequence. Later on the commit b107603b4ad0 ("drm/msm/dpu: map mixer/ctl hw blocks in encoder modeset") rearanged the code, but still kept the cstate->num_mixers assignment to happen during commit phase. This makes dpu_crtc_state inconsistent between consequent atomic_check() calls. Move CRTC resource assignment to happen at the end of dpu_encoder_virt_atomic_check(). Fixes: b107603b4ad0 ("drm/msm/dpu: map mixer/ctl hw blocks in encoder modeset") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/612235/ Link: https://lore.kernel.org/r/20240903-dpu-mode-config-width-v6-2-617e1ecc4b7a@linaro.org Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
2024-06-25drm/msm/dpu: remove CRTC frame event callback registrationDmitry Baryshkov
The frame event callback is always set to dpu_crtc_frame_event_cb() (or to NULL) and the data is always either the CRTC itself or NULL (correpondingly). Thus drop the event callback registration, call the dpu_crtc_frame_event_cb() directly and gate on the dpu_enc->crtc assigned using dpu_encoder_assign_crtc(). Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/600751/ Link: https://lore.kernel.org/r/20240625-dpu-no-crtc-register-v3-1-1b161df13776@linaro.org
2024-04-23drm/msm: merge dpu_format and mdp_format in struct msm_formatDmitry Baryshkov
Structures dpu_format and mdp_format are largely the same structures. In order to remove duplication between format databases, merge these two stucture definitions into the global struct msm_format. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/590434/ Link: https://lore.kernel.org/r/20240420-dpu-format-v2-5-9e93226cbffd@linaro.org
2023-12-14drm/msm/dpu: Drop enable and frame_count parameters from dpu_hw_setup_misr()Jessica Zhang
Drop the enable and frame_count parameters from dpu_hw_setup_misr() as they are always set to the same values. In addition, replace MISR_FRAME_COUNT_MASK with MISR_FRAME_COUNT as frame_count is always set to the same value. Fixes: 7b37523fb1d1 ("drm/msm/dpu: Move MISR methods to dpu_hw_util") Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/572009/ Link: https://lore.kernel.org/r/20231213-encoder-fixup-v4-2-6da6cd1bf118@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-12-05drm/msm/dpu: use drmm-managed allocation for dpu_crtcDmitry Baryshkov
Change struct dpu_crtc allocation to use drmm_crtc_alloc_with_planes(). This removes the need to perform any actions on CRTC destruction. Reviewed-by: Jessica Zhang <quic_jesszhan@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/570054/ Link: https://lore.kernel.org/r/20231201211845.1026967-11-dmitry.baryshkov@linaro.org
2023-10-09drm/msm: Remove unnecessary NULL valuesRuan Jinjie
The NULL initialization of the pointers assigned by kzalloc() first is not necessary, because if the kzalloc() failed, the pointers will be assigned NULL, otherwise it works as usual. so remove it. Signed-off-by: Ruan Jinjie <ruanjinjie@huawei.com> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/551872/ Link: https://lore.kernel.org/r/20230809034445.434902-4-ruanjinjie@huawei.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-08-02drm/msm/dpu: drop the dpu_core_perf_crtc_update()'s stop_req paramDmitry Baryshkov
The stop_req is true only in the dpu_crtc_disable() case, when crtc->enable has already been set to false. This renders the stop_req argument useless. Remove it completely. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/550206/ Link: https://lore.kernel.org/r/20230730010102.350713-6-dmitry.baryshkov@linaro.org
2023-06-15drm/msm/dpu: do not enable color-management if DSPPs are not availableDmitry Baryshkov
We can not support color management without DSPP blocks being provided in the HW catalog. Do not enable color management for CRTCs if num_dspps is 0. Fixes: 4259ff7ae509 ("drm/msm/dpu: add support for pcc color block in dpu driver") Reported-by: Yongqin Liu <yongqin.liu@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Sumit Semwal <sumit.semwal@linaro.org> Tested-by: Yongqin Liu <yongqin.liu@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/542141/ Link: https://lore.kernel.org/r/20230612182534.3345805-1-dmitry.baryshkov@linaro.org
2023-06-04drm/msm: Remove unnecessary (void*) conversionsSu Hui
Pointer variables of (void*) type do not require type cast. Signed-off-by: Su Hui <suhui@nfschina.com> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/540599/ Link: https://lore.kernel.org/r/20230522013213.25876-1-suhui@nfschina.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-04-06msm/disp/dpu: allow atomic_check in PSR usecaseVinod Polimera
Certain flags like dirty_fb will be updated into the plane state during crtc atomic_check. Allow those updates during PSR commit. Reported-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/all/20230326162723.3lo6pnsfdwzsvbhj@ripper/ Signed-off-by: Vinod Polimera <quic_vpolimer@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Tested-by: Douglas Anderson <dianders@chromium.org> Patchwork: https://patchwork.freedesktop.org/patch/530208/ Link: https://lore.kernel.org/r/1680271114-1534-3-git-send-email-quic_vpolimer@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-04-06drm/msm/dpu: set dirty_fb flag while in self refresh modeVinod Polimera
While in virtual terminal mode with PSR enabled, there will be no atomic commits triggered without dirty_fb being set. This will create a notion of no screen update. Allow atomic commit when dirty_fb ioctl is issued, so that it can trigger a PSR exit and shows update on the screen. Reported-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/all/20230326162723.3lo6pnsfdwzsvbhj@ripper/ Signed-off-by: Vinod Polimera <quic_vpolimer@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Tested-by: Douglas Anderson <dianders@chromium.org> Patchwork: https://patchwork.freedesktop.org/patch/530206/ Link: https://lore.kernel.org/r/1680271114-1534-2-git-send-email-quic_vpolimer@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-04-06drm/msm/dpu: log the multirect_index in _dpu_crtc_blend_setup_pipeAbhinav Kumar
Lets print the multirect_index as well in _dpu_crtc_blend_setup_pipe() as it will give the complete information of the sw_pipe as well. Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/527350/ Link: https://lore.kernel.org/r/20230316161653.4106395-32-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-04-06drm/msm/dpu: add support for wide planesDmitry Baryshkov
It is possible to use multirect feature and split source to use the SSPP to output two consecutive rectangles. This commit brings in this capability to support wider screen resolutions. Tested-by: Abhinav Kumar <quic_abhinavk@quicinc.com> # sc7280 Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/527358/ Link: https://lore.kernel.org/r/20230316161653.4106395-28-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-04-06drm/msm/dpu: split pipe handling from _dpu_crtc_blend_setup_mixerDmitry Baryshkov
Rework _dpu_crtc_blend_setup_mixer() to split away pipe handling to a separate functon. This is a preparation for the r_pipe support. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Tested-by: Abhinav Kumar <quic_abhinavk@quicinc.com> # sc7280 Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/527354/ Link: https://lore.kernel.org/r/20230316161653.4106395-27-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-04-06drm/msm/dpu: drop redundant plane dst check from dpu_crtc_atomic_check()Dmitry Baryshkov
The helper drm_atomic_helper_check_plane_state() already checks whether the scaled and clipped plane falls into the CRTC visible region (and clears plane_state->visible if it doesn't). Drop the redundant check from dpu_crtc_atomic_check(). Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Tested-by: Abhinav Kumar <quic_abhinavk@quicinc.com> # sc7280 Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/527343/ Link: https://lore.kernel.org/r/20230316161653.4106395-18-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-04-06drm/msm/dpu: move the rest of plane checks to dpu_plane_atomic_check()Dmitry Baryshkov
Move plane state updates from dpu_crtc_atomic_check() to the function where they belong: to dpu_plane_atomic_check(). Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Tested-by: Abhinav Kumar <quic_abhinavk@quicinc.com> # sc7280 Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/527335/ Link: https://lore.kernel.org/r/20230316161653.4106395-17-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-04-06drm/msm/dpu: don't use unsupported blend stagesDmitry Baryshkov
The dpu_crtc_atomic_check() compares blending stage with DPU_STAGE_MAX (maximum amount of blending stages supported by the driver), however we should compare it against .max_mixer_blendstages, the maximum blend stage supported by the mixer. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Tested-by: Abhinav Kumar <quic_abhinavk@quicinc.com> # sc7280 Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/527338/ Link: https://lore.kernel.org/r/20230316161653.4106395-16-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-04-06drm/msm/dpu: drop src_split and multirect check from dpu_crtc_atomic_checkDmitry Baryshkov
Neither source split nor multirect are properly supported at this moment. Both of these checks depend on normalized_zpos being equal for several planes (which is never the case for normalized zpos). Drop these checks to simplify dpu_crtc_atomic_check(). The actual support for either of these features is not removed from the backend code (sspp, ctl, etc). Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Tested-by: Abhinav Kumar <quic_abhinavk@quicinc.com> # sc7280 Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/527332/ Link: https://lore.kernel.org/r/20230316161653.4106395-15-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-04-06drm/msm/dpu: introduce struct dpu_sw_pipeDmitry Baryshkov
Wrap SSPP and multirect index/mode into a single structure that represents software view on the pipe used. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Tested-by: Abhinav Kumar <quic_abhinavk@quicinc.com> # sc7280 Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/527326/ Link: https://lore.kernel.org/r/20230316161653.4106395-8-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-04-06drm/msm/dpu: drop dpu_plane_pipe functionDmitry Baryshkov
There no more need for the dpu_plane_pipe() function, crtc code can access pstate->pipe_hw.idx directly. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Tested-by: Abhinav Kumar <quic_abhinavk@quicinc.com> # sc7280 Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/527320/ Link: https://lore.kernel.org/r/20230316161653.4106395-7-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-04-06drm/msm/disp/dpu1: add support for dspp sub block flush in sc7280Kalyan Thota
Flush mechanism for DSPP blocks has changed in sc7280 family, it allows individual sub blocks to be flushed in coordination with master flush control. Representation: master_flush && (PCC_flush | IGC_flush .. etc ) This change adds necessary support for the above design. Changes in v1: - Few nits (Doug, Dmitry) - Restrict sub-block flush programming to dpu_hw_ctl file (Dmitry) Changes in v2: - Move the address offset to flush macro (Dmitry) - Separate ops for the sub block flush (Dmitry) Changes in v3: - Reuse the DPU_DSPP_xx enum instead of a new one (Dmitry) Changes in v4: - Use shorter version for unsigned int (Stephen) Changes in v5: - Spurious patch please ignore. Changes in v6: - Add SOB tag (Doug, Dmitry) Changes in v7: - Cache flush mask per dspp (Dmitry) - Few nits (Marijn) Changes in v8: - Few nits (Marijn) Changes in v9: - Use DSPP enum while accessing flush mask to make it readable (Dmitry) - Few nits (Dmitry) Changes in v10: - Fix white spaces in a separate patch (Dmitry) Changes in v11: - Define a macro for dspp flush selection (Marijn) - Few nits (Marijn) Changes in v12: - Minor comments (reorder macros and a condition) (Marijn) Signed-off-by: Kalyan Thota <quic_kalyant@quicinc.com> Tested-by: Douglas Anderson <dianders@chromium.org> Patchwork: https://patchwork.freedesktop.org/patch/520701/ Link: https://lore.kernel.org/r/1674814487-2112-1-git-send-email-quic_kalyant@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-03-13drm/msm/disp/dpu: update dpu_enc crtc state on crtc enable/disable during ↵Vinod Polimera
self refresh Populate the enocder software structure to reflect the updated crtc appropriately during crtc enable/disable for a new commit while taking care of the self refresh transitions when crtc disable is triggered from the drm self refresh library. Signed-off-by: Vinod Polimera <quic_vpolimer@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/524742/ Link: https://lore.kernel.org/r/1677774797-31063-14-git-send-email-quic_vpolimer@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-03-13drm/msm/disp/dpu: add PSR support for eDP interface in dpu driverVinod Polimera
Enable PSR on eDP interface using drm self-refresh librabry. This patch uses a trigger from self-refresh library to enter/exit into PSR, when there are no updates from framework. Signed-off-by: Kalyan Thota <quic_kalyant@quicinc.com> Signed-off-by: Vinod Polimera <quic_vpolimer@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/524739/ Link: https://lore.kernel.org/r/1677774797-31063-13-git-send-email-quic_vpolimer@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-01-24drm/msm/dpu: Add check for pstatesJiasheng Jiang
As kzalloc may fail and return NULL pointer, it should be better to check pstates in order to avoid the NULL pointer dereference. Fixes: 25fdd5933e4c ("drm/msm: Add SDM845 DPU support") Signed-off-by: Jiasheng Jiang <jiasheng@iscas.ac.cn> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/514160/ Link: https://lore.kernel.org/r/20221206080236.43687-1-jiasheng@iscas.ac.cn Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-01-24drm/msm/dpu: Add check for cstateJiasheng Jiang
As kzalloc may fail and return NULL pointer, it should be better to check cstate in order to avoid the NULL pointer dereference in __drm_atomic_helper_crtc_reset. Fixes: 1cff7440a86e ("drm/msm: Convert to using __drm_atomic_helper_crtc_reset() for reset.") Signed-off-by: Jiasheng Jiang <jiasheng@iscas.ac.cn> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/514163/ Link: https://lore.kernel.org/r/20221206080517.43786-1-jiasheng@iscas.ac.cn Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
generated by cgit v1.2.3 (git 2.39.1) at 2025-08-02 20:01:17 +0000