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path: root/drivers/gpu/drm/i915/gvt/handlers.c
AgeCommit message (Expand)Author
2025-06-09drm/i915: split out display register macros to a separate fileJani Nikula
2025-06-04drm/i915/sbi: clean up SBI register macro definitions and usageJani Nikula
2025-06-04drm/i915/sbi: split out intel_sbi_regs.hJani Nikula
2025-05-27drm/i915: stop including display/intel_display_{core, limits}.h from i915_drv.hJani Nikula
2025-05-16drm/{i915,xe}: convert i915 and xe display members into pointersJani Nikula
2025-04-25drm/i915/vga: Extract intel_vga_regs.hVille Syrjälä
2025-04-01drm/i915/gvt: use hardcoded reference clocksJani Nikula
2025-03-25drm/i915/gvt: Stop using intel_runtime_pm_put_unchecked()Ville Syrjälä
2025-01-23drm/i915/gvt: fix typos in i915/gvt filesNitin Gote
2025-01-13drm/i915/gvt: Remove unused intel_gvt_in_force_nonpriv_whitelistDr. David Alan Gilbert
2024-12-16drm/i915/gvt: always pass struct intel_display * to register macrosJani Nikula
2024-11-11drm/i915/crt: Extract intel_crt_regs.hVille Syrjälä
2024-10-22drm/i915/gvt: use macros from drm_dp.h instead of duplicationJani Nikula
2024-06-19Merge drm/drm-next into drm-intel-nextJani Nikula
2024-06-14drm/i915/gvt: do not use implict dev_priv in DSPSURF_TO_PIPE()Jani Nikula
2024-06-14drm/i915/gvt: rename range variable to strideJani Nikula
2024-06-14drm/i915/gvt: use proper i915_reg_t for calc_index() parametersJani Nikula
2024-06-14drm/i915/gvt: remove the unused end parameter from calc_index()Jani Nikula
2024-06-07drm/i915: pass dev_priv explicitly to TRANS_DDI_FUNC_CTLJani Nikula
2024-06-07drm/i915: pass dev_priv explicitly to PIPE_LINK_N1Jani Nikula
2024-06-07drm/i915: pass dev_priv explicitly to PIPE_LINK_M1Jani Nikula
2024-06-07drm/i915: pass dev_priv explicitly to PIPE_FLIPCOUNT_G4XJani Nikula
2024-06-07drm/i915: pass dev_priv explicitly to TRANSCONFJani Nikula
2024-06-07drm/i915: pass dev_priv explicitly to TRANS_VTOTALJani Nikula
2024-06-07drm/i915: pass dev_priv explicitly to TRANS_HTOTALJani Nikula
2024-05-31drm/i915/gvt: use proper macros for DP AUX CH CTL registersJani Nikula
2024-05-24drm/i915: pass dev_priv explicitly to DSPSURFLIVEJani Nikula
2024-05-24drm/i915: pass dev_priv explicitly to DSPSURFJani Nikula
2024-05-24drm/i915: pass dev_priv explicitly to DSPCNTRJani Nikula
2024-05-22drm/i915: Extract i9xx_plane_regs.hVille Syrjälä
2024-05-19Merge tag 'mm-stable-2024-05-17-19-19' of git://git.kernel.org/pub/scm/linux/...Linus Torvalds
2024-05-15drm/i915/gvt: Use the proper PLANE_AUX_OFFSET() defineVille Syrjälä
2024-05-15drm/i915/gvt: Use the proper PLANE_AUX_DIST() defineVille Syrjälä
2024-05-15drm/i915: Move skl+ wm/ddb registers to proper headersVille Syrjälä
2024-05-15drm/i915: Extract skl_universal_plane_regs.hVille Syrjälä
2024-04-29drm/i915/display: split out intel_sprite_regs.h from i915_reg.hJani Nikula
2024-04-25fix missing vmalloc.h includesKent Overstreet
2024-04-19drm/i915/dpio: Extract bxt_dpio_phy_regs.hVille Syrjälä
2024-04-19drm/i915/dpio: Add per-lane PHY TX register definitons for bxt/glkVille Syrjälä
2024-02-05drm/i915/gvt: Fix uninitialized variable in handle_mmio()Dan Carpenter
2023-11-08drm/i915/gvt: Clean up zero initializersVille Syrjälä
2023-10-23drm/i915/aux: add separate register macros and functions for VLV/CHVJani Nikula
2023-05-04drm/i915: Rename skl+ scaler binding bitsVille Syrjälä
2023-04-04drm/i915/psr: split out PSR regs to a separate fileJani Nikula
2023-04-04drm/i915/wm: split out SKL+ watermark regs to a separate fileJani Nikula
2023-03-30drm/i915/fdi: split out FDI regs to a separate fileJani Nikula
2023-03-30drm/i915/aux: split out DP AUX regs to a separate fileJani Nikula
2023-03-30drm/i915/pps: split out PPS regs to a separate fileJani Nikula
2023-02-17drm/i915: s/PIPECONF/TRANSCONF/Ville Syrjälä
2023-02-17drm/i915: Give CPU transcoder timing registers TRANS_ prefixVille Syrjälä
generated by cgit v1.2.3 (git 2.39.1) at 2025-08-05 10:54:29 +0000