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path: root/drivers/gpu/drm/i915/display/g4x_dp.c
AgeCommit message (Expand)Author
2025-06-09drm/i915: split out display register macros to a separate fileJani Nikula
2025-04-24drm/i915/reg: use REG_BIT and friends to define DP registersJani Nikula
2025-04-22drm/i915/display: drop lots of unnecessary #include i915_drv.hJani Nikula
2025-04-22drm/i915/display: pass struct intel_display to PCH macrosJani Nikula
2025-04-14drm/i915/dpio: have chv_data_lane_soft_reset() get/put dpio internallyJani Nikula
2025-04-07drm/i915/dp: Rename intel_dp::link_trained to link.activeImre Deak
2025-03-03drm/i915/hdcp: add hdcp sub-struct to struct intel_digital_portJani Nikula
2025-02-15drm/i915: Simplify vlv_wait_port_ready() argumentsVille Syrjälä
2025-02-13drm/i915/display: convert intel_set_{cpu,pch}_fifo_underrun_reporting() to in...Jani Nikula
2025-02-13drm/i915/hpd: drop dev_priv parameter from intel_hpd_pin_default()Jani Nikula
2025-02-13drm/i915/display: convert assert_port_valid() to struct intel_displayJani Nikula
2025-02-13drm/i915/display: convert assert_transcoder*() to struct intel_displayJani Nikula
2025-02-13drm/i915/dp: convert g4x_dp.[ch] to struct intel displayJani Nikula
2025-02-11drm/i915: Continue intel_display_power struct intel_display conversionVille Syrjälä
2025-02-10drm/i915: Convert intel_display_power_{get,put}*() to intel_displayVille Syrjälä
2025-02-10drm/i915: Convert intel_crtc.c to struct intel_displayVille Syrjälä
2024-12-16drm/i915/uncore: add to_intel_uncore() and use itJani Nikula
2024-12-11drm/i915/dp: move g4x_dp_set_clock() call to g4x_dp_compute_config()Jani Nikula
2024-12-11drm/i915/dp: add g4x_dp_compute_config()Jani Nikula
2024-10-31drm/i915/dp: Track source OUI validity explicitlyImre Deak
2024-10-30drm/i915/display: convert vlv_wait_port_ready() to struct intel_displayJani Nikula
2024-10-29drm/i915/display: convert I915_STATE_WARN() to struct intel_displayJani Nikula
2024-09-23drm/i915/dp: clean up intel_dp_test.[ch] interfaceJani Nikula
2024-09-23drm/i915/dp: split out intel_dp_test.[ch] to a dedicated fileJani Nikula
2024-09-19drm/i915/pps: move vlv_active_pipe() to intel_pps.cJani Nikula
2024-09-19drm/i915/pps: rename vlv_pps_init() to vlv_pps_port_enable_unlocked()Jani Nikula
2024-09-19drm/i915/pps: add vlv_pps_port_disable()Jani Nikula
2024-09-19drm/i915/pps: add vlv_pps_pipe_reset()Jani Nikula
2024-09-19drm/i915/pps: add vlv_ prefix to pps_pipe and active_pipe membersJani Nikula
2024-09-03drm/i915/dp: convert g4x_dp.[ch] to struct intel_displayJani Nikula
2024-08-12drm/i915/bios: convert to struct intel_displayJani Nikula
2024-06-13drm/i915/dp: Use check link state work in the hotplug handlerImre Deak
2024-06-13drm/i915/dp: Pass atomic state to link training functionImre Deak
2024-06-13drm/i915/dp: Recheck link state after modesetImre Deak
2024-06-07drm/i915: pass dev_priv explicitly to PORT_HOTPLUG_STATJani Nikula
2024-03-06drm/i915: Stop doing double audio enable/disable on SDVO and g4x+ DPVille Syrjälä
2023-11-23drm/i915: Hoist the encoder->audio_{enable,disable}() calls higher upVille Syrjälä
2023-11-23drm/i915: Convert audio enable/disable into encoder vfuncsVille Syrjälä
2023-11-23drm/i915: Split g4x+ DP audio presence detect from port enableVille Syrjälä
2023-11-23drm/i915: Wrap g4x+ DP/HDMI audio enable/disableVille Syrjälä
2023-11-23drm/i915: Push audio enable/disable further outVille Syrjälä
2023-09-13drm/i915: Introduce crtc_state->enhanced_framingVille Syrjälä
2023-07-06drm/i915: Remove AUX CH sanitationVille Syrjälä
2023-07-06drm/i915: Initialize dig_port->aux_ch to NONE to be sureVille Syrjälä
2023-06-20drm/i915: Assert that the port being initialized is validVille Syrjälä
2023-05-15drm/i915/display: add i915 parameter to I915_STATE_WARN()Jani Nikula
2023-03-07drm/i915: Get rid of the gm45 HPD live state nonsenseVille Syrjälä
2023-02-17drm/i915: Restructure intel_bios_port_aux_ch()Ville Syrjälä
2023-02-16drm/i915/display/misc: use intel_de_rmw if possibleAndrzej Hajda
2023-02-14drm/i915: Pass devdata to intel_bios_port_aux_ch()Ville Syrjälä
generated by cgit v1.2.3 (git 2.39.1) at 2025-07-31 20:08:59 +0000