summaryrefslogtreecommitdiff
path: root/drivers/clk/renesas
AgeCommit message (Expand)Author
2025-07-08clk: renesas: r9a08g045: Add MSTOP for coupled clocks as wellClaudiu Beznea
2025-07-08clk: renesas: r9a09g047: Add clock and reset signals for the GBETH IPsJohn Madieu
2025-07-02clk: renesas: r9a09g057: Add XSPI clock/resetLad Prabhakar
2025-07-02clk: renesas: r9a09g056: Add XSPI clock/resetLad Prabhakar
2025-07-02clk: renesas: rzv2h: Add fixed-factor module clocks with status reportingLad Prabhakar
2025-07-02clk: renesas: r9a09g057: Add support for xspi mux and dividerLad Prabhakar
2025-07-02clk: renesas: r9a09g056: Add support for xspi mux and dividerLad Prabhakar
2025-07-02clk: renesas: r9a09g077: Add RIIC module clocksLad Prabhakar
2025-07-02clk: renesas: r9a09g077: Add PLL2 and SDHI clock supportLad Prabhakar
2025-07-02clk: renesas: rzv2h: Drop redundant base pointer from pll_clkLad Prabhakar
2025-07-02clk: renesas: r9a09g057: Add entries for the RSPIsFabrizio Castro
2025-06-26clk: renesas: rzv2h: Add missing include fileFabrizio Castro
2025-06-24clk: renesas: rzv2h: Use devm_kmemdup_array()Raag Jadav
2025-06-19clk: renesas: Add CPG/MSSR support to RZ/N2H SoCLad Prabhakar
2025-06-19clk: renesas: r9a09g077: Add PCLKL core clockLad Prabhakar
2025-06-19clk: renesas: r9a09g047: Add I3C0 clocks and resetsTommaso Merciai
2025-06-13clk: renesas: rzv2h: Fix missing CLK_SET_RATE_PARENT flag for ddiv clocksLad Prabhakar
2025-06-10clk: renesas: rzg2l: Rename mstp_clock to mod_clockGeert Uytterhoeven
2025-06-10clk: renesas: r9a09g056: Add clock and reset entries for USB2.0Lad Prabhakar
2025-06-10clk: renesas: rzg2l: Drop MSTOP based power domain supportClaudiu Beznea
2025-06-10clk: renesas: r9a08g045: Drop power domain instantiationClaudiu Beznea
2025-06-10clk: renesas: rzg2l: Add support for MSTOP in clock enable/disable APIClaudiu Beznea
2025-06-10clk: renesas: rzg2l: Add macro to loop through module clocksClaudiu Beznea
2025-06-10clk: renesas: Add support for R9A09G077 SoCThierry Bultel
2025-06-10clk: renesas: Pass sub struct of cpg_mssr_priv to cpg_clk_registerThierry Bultel
2025-06-10clk: renesas: rzg2l: Move pointers after hw memberClaudiu Beznea
2025-06-10clk: renesas: rzg2l: Postpone updating priv->clks[]Claudiu Beznea
2025-06-10clk: renesas: r9a09g056: Add clocks and resets for Mali-G31 GPULad Prabhakar
2025-06-10clk: renesas: r9a09g056: Add clock and reset entries for WDT controllersLad Prabhakar
2025-06-10clk: renesas: r9a09g056: Add clock and reset entries for RIIC controllersLad Prabhakar
2025-06-10clk: renesas: r9a09g056-cpg: Add clock and reset entries for OSTM instancesLad Prabhakar
2025-06-10clk: renesas: r9a09g056-cpg: Add clock and reset entries for GBETH0/1Lad Prabhakar
2025-06-10clk: renesas: r9a09g057: Add clock and reset entries for GBETH0/1Lad Prabhakar
2025-06-10clk: renesas: rzv2h: Skip monitor checks for external clocksLad Prabhakar
2025-05-08clk: renesas: r9a09g047: Add XSPI clock/resetBiju Das
2025-05-08clk: renesas: r9a09g047: Add support for xspi mux and dividerBiju Das
2025-05-05clk: renesas: Use str_on_off() helperGeert Uytterhoeven
2025-04-22clk: renesas: r9a09g057: Add clock and reset entries for USB2Lad Prabhakar
2025-04-22clk: renesas: rzv2h: Use both CLK_ON and CLK_MON bits for clock state validationLad Prabhakar
2025-04-22clk: renesas: rzv2h: Use str_on_off() helper in rzv2h_mod_clock_endisable()Lad Prabhakar
2025-04-22clk: renesas: rzv2h: Support static dividers without RMWBiju Das
2025-04-22clk: renesas: rzv2h: Add macro for defining static dividersLad Prabhakar
2025-04-22clk: renesas: rzv2h: Add support for static mux clocksLad Prabhakar
2025-04-22clk: renesas: r9a09g047: Add clock and reset entries for GE3DTommaso Merciai
2025-04-22clk: renesas: rzv2h: Fix a typoBiju Das
2025-04-14clk: renesas: rzv2h: Add support for RZ/V2N SoCLad Prabhakar
2025-04-14clk: renesas: rzv2h: Sort compatible list based on SoC part numberLad Prabhakar
2025-04-14clk: renesas: rzv2h: Simplify rzv2h_cpg_assert()/rzv2h_cpg_deassert()Tommaso Merciai
2025-04-14clk: renesas: rzv2h: Improve rzv2h_ddiv_set_rate()Tommaso Merciai
2025-04-08clk: renesas: r9a09g057: Add clock and reset entries for GE3DLad Prabhakar