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path: root/drivers/clk/qcom/videocc-sm8250.c
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2024-07-19Merge tag 'clk-for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull clk updates from Stephen Boyd: "This a large collection of clk driver updates and a handful of new SoC clk driver support. We have the usual Qualcomm clk drivers, along with clk drivers for the Sophgo and T-Head vendors, all to support some new SoCs. Nothing in particular stands out to me in the updates. There's the interconnect clk driver which exposes clks as interconnects, crossing subsystems. There's a bunch of janitorial things that are improving drivers in general like kmemdup_array() or fixing error paths. But overall the updates look normal to fix the description data which is usually the stuff that's wrong and/or untested. Core: - Skip gate basic type KUnit tests on s390 due to lack of MMIO emulation New Drivers: - AP sub-system clock controller in the T-Head TH1520 - Sophgo Sophon sg2042 clk driver - Qualcomm SM7150 camera, display and video clk drivers - Qualcomm QCM2290 GPU clk driver - Qualcomm QCS8386/QCS8084 NSS clk driver - Qualcomm SM8650 camera and video drivers Updates: - Add reset support to Airoha EN7581 clk driver - Add MODULE_DESCRIPTIONs to various clk drivers - Introduce helper logic to expose clock controllers as simple interconnect providers - Use the interconnect helper above on Qualcomm ipq9574 - Add CLK_SET_RATE_PARENT to the remaining USB pipe clocks on Qualcomm X1Elite - Improve error handling in Qualcomm kpss-xcc driver - Mark Qualcomm SC8280XP LPASS clock controller regmap_config const - Export more clocks for Rockchip rk3128 peripherals - Convert Rockchip clk drivers to use kmemdup_array() - Drop CLK_NR_CLKS from Rockchip rk3128 and rk3188 binding headers - Make qcom_cc_really_probe() take a struct device to allow reuse in non-platform-drivers - Introduce prepare-only branch clock ops in the qcom clk driver to support clocks on buses that take locks - Describe parent/child relationship for Qualcomm SC7280 camera GDSCs - Support Qualcomm Huayra 2290 alpha PLL - Adjust the highest SDCC clock frequency on Qualcomm IPQ6018 to match HS200 support - Add missing PCIe PIPE clocks on Qualcomm IPQ9574 - Fix various configurations and properties in the Qualcomm SA8775P, X1E80100 and SM7280 drivers - Park Qualcomm SM8350 GPU RCGs on XO while disabled - Remove unused CONFIG_QCOM_RPMCC Kconfig symbol - exynos-clkout: Remove usage of of_device_id table as .of_match_table, because the driver is instantiated as MFD cell, not as standalone platform driver. Populated .of_match_table confused people few times to convert the code to device_get_match_data(), which broke the driver - Mark one Samsung UFS clock as critical, because having it off stops the system from shutdown - Use kmemdup_array() when applicable - Remove unused 'struct gates_data' from old sunxi driver library - Add GPADC clock and reset for Allwinner H616 - Minor Amlogic S4 clock fixes - DT bindings Yaml conversion of the Amlogic AXG audio controller - Amlogic C3 clock controllers support - Amlogic clk flag added to skip init of already enabled PLLs and avoid relocking - Amlogic A1 DT bindings updates for system pll support - Add missing MODULE_DESCRIPTION where necessary - Remove obsolete clock DT binding header files - Add Battery Backup (VBATTB) and I2C clocks, resets, and power domains on Renesas RZ/G3S - Add audio clocks on Renesas R-Car V4M - Add video capture (ISPCS, CSI-2, VIN) clocks on Renesas R-Car V4M" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (135 commits) clk: thead: Add support for T-Head TH1520 AP_SUBSYS clocks dt-bindings: clock: Document T-Head TH1520 AP_SUBSYS controller clk: sophgo: Avoid -Wsometimes-uninitialized in sg2042_clk_pll_set_rate() clk/sophgo: Using BUG() instead of unreachable() in mmux_get_parent_id() clk: mxs: Use clamp() in clk_ref_round_rate() and clk_ref_set_rate() clk: sunxi-ng r40: Constify struct regmap_config clk: en7523: fix rate divider for slic and spi clocks clk: lpc32xx: Constify struct regmap_config clk: xilinx: Constify struct regmap_config clk: en7523: Remove PCIe reset open drain configuration for EN7581 clk: en7523: Remove pcie prepare/unpreare callbacks for EN7581 SoC clk: en7523: Add reset-controller support for EN7581 SoC dt-bindings: clock: airoha: Add reset support to EN7581 clock binding dt-bindings: clock: mediatek: Document reset cells for MT8188 sys clk: mediatek: mt8173-infracfg: Handle unallocated infracfg when module dt-bindings: clock: mediatek: add syscon compatible for mt7622 pciesys dt-bindings: clock: sprd,sc9860-clk: convert to YAML dt-bindings: clock: qoriq-clock: convert to yaml format clk: qcom: Park shared RCGs upon registration clk: qcom: ipq9574: Use icc-clk for enabling NoC related clocks ...
2024-07-09clk: qcom: videocc: Use HW_CTRL_TRIGGER for SM8250, SC7280 vcodec GDSC'sJagadeesh Kona
For Venus V6 variant SoCs(sm8250, sc7280), the venus driver uses the newly introduced dev_pm_genpd_set_hwmode() API to switch the vcodec GDSC to HW/SW control modes at runtime. Hence use HW_CTRL_TRIGGER flag for vcodec GDSC's on sm8250, sc7280 to register the set_hwmode_dev & get_hwmode_dev callbacks for vcodec GDSC and allow the GDSC mode to be changed using dev_pm_genpd_set_hwmode() API. Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Reviewed-by: Taniya Das <quic_tdas@quicinc.com> Acked-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20240624044809.17751-5-quic_jkona@quicinc.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-06-12clk: qcom: common: commonize qcom_cc_really_probeLuo Jie
The previous wrapper qcom_cc_really_probe takes the platform device as parameter, which is limited to platform driver. As for qca8k clock controller driver, which is registered as the MDIO device, which also follows the qcom clock framework. To commonize qcom_cc_really_probe, updating it to take the struct device as parameter, so that the qcom_cc_really_probe can be utilized by the previous platform device and the new added MDIO device. Also update the current clock controller drivers to take &pdev->dev as parameter when calling qcom_cc_really_probe. Reviewed-by: Stephen Boyd <sboyd@kernel.org> Tested-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Luo Jie <quic_luoj@quicinc.com> Link: https://lore.kernel.org/r/20240605124541.2711467-4-quic_luoj@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-05-27clk: qcom: Constify struct pll_vcoChristophe JAILLET
pll_vco structure are never modified. They are used as .vco_table in "struct clk_alpha_pll". And in this structure, we have: const struct pll_vco *vco_table; Constifying these structures moves some data to a read-only section, so increase overall security. On a x86_64, with allmodconfig: Before: text data bss dec hex filename 9905 47576 0 57481 e089 drivers/clk/qcom/mmcc-msm8994.o After: text data bss dec hex filename 10033 47440 0 57473 e081 drivers/clk/qcom/mmcc-msm8994.o Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Acked-by: Stephen Boyd <sboyd@kernel.org> Link: https://lore.kernel.org/r/c3c9a75ed77a5ef2e9b72081e88225d84bba91cd.1715359776.git.christophe.jaillet@wanadoo.fr Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-02-14clk: qcom: Use qcom_branch_set_clk_en()Konrad Dybcio
Instead of magically poking at the bit0 of branch clocks' CBCR, use the newly introduced helper. Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Johan Hovold <johan+linaro@kernel.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20240212-topic-clk_branch_en-v7-2-5b79eb7278b2@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-02-07clk: qcom: videocc-*: switch to module_platform_driverDmitry Baryshkov
There is no need to register video clock controllers during subsys init calls. Use module_platform_driver() instead. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20240206-clk-module-platform-driver-v1-4-db799bd2feeb@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-02-07clk: qcom: videocc-sm8250: Set delay for Venus CLK resetsKonrad Dybcio
Some Venus resets may require more time when toggling. Describe that. The value was obtained by referencing the msm-4.14/19 driver, which uses a single value for all platforms [1]. [1] https://git.codelinaro.org/clo/la/platform/vendor/opensource/video-driver/-/blob/LA.UM.9.15.c26/msm/vidc/hfi_common.c?ref_type=heads#L3662-3663 Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20240105-topic-venus_reset-v2-15-c37eba13b5ce@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-01-10clk: qcom: videocc-sm8250: switch to devm_pm_runtime_enableDmitry Baryshkov
Switch to using the devm_pm_runtime_enable() instead of hand-coding corresponding action to call pm_runtime_disable(). Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230103145515.1164020-22-dmitry.baryshkov@linaro.org
2022-07-18clk: qcom: Drop mmcx gdsc supply for dispcc and videoccAbel Vesa
Both dispcc and videocc use mmcx power domain now. Lets drop the supply mmcx from every gdsc. Cc: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Fixes: 266e5cf39a0f ("arm64: dts: qcom: sm8250: remove mmcx regulator") Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220713143200.3686765-1-abel.vesa@linaro.org
2021-10-14clk: qcom: videocc-sm8250: use runtime PM for the clock controllerDmitry Baryshkov
On sm8250 dispcc and videocc registers are powered up by the MMCX power domain. Use runtime PM calls to make sure that required power domain is powered on while we access clock controller's registers. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210829154757.784699-5-dmitry.baryshkov@linaro.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-04-07clk: qcom: videocc-sm8250: use parent_hws where possibleDmitry Baryshkov
Switch to using parent_hws instead of parent_data when parents are defined in this driver and so accessible using clk_hw. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20210405224743.590029-29-dmitry.baryshkov@linaro.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-04-07clk: qcom: videocc-sm8250: drop unused enum entriesDmitry Baryshkov
Drop unused enum entries from the list of parent enums. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20210405224743.590029-11-dmitry.baryshkov@linaro.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-02-08clk: qcom: videocc: Add gdsc mmcx-reg supply hookBryan O'Donoghue
This commit adds a regulator supply hook to mmcx-reg missing from - mvs0c_gdsc - mvs1c_gdsc - mvs0_gdsc - mvs1_gdsc Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20210204150120.1521959-5-bryan.odonoghue@linaro.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-02-08clk: qcom: videocc: Add sm8250 VIDEO_CC_MVS0_CLKBryan O'Donoghue
This patch adds the missing video_cc_mvs0_clk entry to videocc-sm8250 replicating in upstream the explicit entry for this clock in downstream. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20210204150120.1521959-4-bryan.odonoghue@linaro.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-02-08clk: qcom: videocc: Add sm8250 VIDEO_CC_MVS0_DIV_CLK_SRCBryan O'Donoghue
This patch adds the missing video_cc_mvs0_div_clk_src entry to videocc-sm8250 replicating in upstream the explicit entry for this clock in downstream. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20210204150120.1521959-3-bryan.odonoghue@linaro.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-10-13clk: qcom: add video clock controller driver for SM8250Jonathan Marek
Add support for the video clock controller found on SM8250 based devices. Derived from the downstream driver. Signed-off-by: Jonathan Marek <jonathan@marek.ca> Link: https://lore.kernel.org/r/20200923160635.28370-6-jonathan@marek.ca Signed-off-by: Stephen Boyd <sboyd@kernel.org>