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path: root/drivers/clk/qcom/common.c
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2025-02-07clk: qcom: Support attaching GDSCs to multiple parentsBryan O'Donoghue
When a clock-controller lists multiple power-domains we need make each GDSC a subdomain of each of the clock-controller's listed power-domains. GDSCs without an explicitly defined parent should be a subdomain of each of the clock-controller's listed power-domains. GDSCs with an explicitly defined parent should attach only to the parent GDSC and not the listed power-domains. Any votes will trickle through the hierarchy up to the external power-domains. ======================================== :: arch/arm64/boot/dts/example.dtsi :: ======================================== clockcc: clock-controller@0 { compat ="qcom,example-clockcc"; power-domains = <&pd_a, &pd_b>; } ======================================== :: drivers/clk/qcom/example-clockcc.c :: ======================================== static struct gdsc parent_gdsc = { .pd = { .name = "parent_gdsc", }, }; static struct gdsc child0_gdsc = { .pd = { .name = "child0_gdsc", }, .parent = &parent_gdsc.pd, }; static struct gdsc child1_gdsc = { .pd = { .name = "child1_gdsc", }, .parent = &parent_gdsc.pd, }; ======================================== :: power-subdomains :: ======================================== pm-domain::pd_a └── pm-subdomain::clockcc::parent_gdsc ├── pm-subdomain::clockcc::child0_gdsc └── pm-subdomain::clockcc::child1_gdsc pm-domain::pd_b └── pm-subdomain::clockcc::parent_gdsc ├── pm-subdomain::clockcc::child1_gdsc └── pm-subdomain::clockcc::child2_gdsc The performance states will percolate through the pm-domain hierarchy to the domains that handle the relevant states. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Link: https://lore.kernel.org/r/20250117-b4-linux-next-24-11-18-clock-multiple-power-domains-v10-4-13f2bb656dad@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-02-07clk: qcom: common: Add support for power-domain attachmentBryan O'Donoghue
Right now we support one power-domain per clock controller. These single power-domains are switched on by the driver platform logic. However when we have multiple power-domains attached to a clock-controller that list of power-domains must be handled outside of driver platform logic. Use devm_pm_domain_attach_list() to automatically hook the list of given power-domains in the dtsi for the clock-controller driver. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Link: https://lore.kernel.org/r/20250117-b4-linux-next-24-11-18-clock-multiple-power-domains-v10-3-13f2bb656dad@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-07-25of: remove internal arguments from of_property_for_each_u32()Luca Ceresoli
The of_property_for_each_u32() macro needs five parameters, two of which are primarily meant as internal variables for the macro itself (in the for() clause). Yet these two parameters are used by a few drivers, and this can be considered misuse or at least bad practice. Now that the kernel uses C11 to build, these two parameters can be avoided by declaring them internally, thus changing this pattern: struct property *prop; const __be32 *p; u32 val; of_property_for_each_u32(np, "xyz", prop, p, val) { ... } to this: u32 val; of_property_for_each_u32(np, "xyz", val) { ... } However two variables cannot be declared in the for clause even with C11, so declare one struct that contain the two variables we actually need. As the variables inside this struct are not meant to be used by users of this macro, give the struct instance the noticeable name "_it" so it is visible during code reviews, helping to avoid new code to use it directly. Most usages are trivially converted as they do not use those two parameters, as expected. The non-trivial cases are: - drivers/clk/clk.c, of_clk_get_parent_name(): easily doable anyway - drivers/clk/clk-si5351.c, si5351_dt_parse(): this is more complex as the checks had to be replicated in a different way, making code more verbose and somewhat uglier, but I refrained from a full rework to keep as much of the original code untouched having no hardware to test my changes All the changes have been build tested. The few for which I have the hardware have been runtime-tested too. Reviewed-by: Andre Przywara <andre.przywara@arm.com> # drivers/clk/sunxi/clk-simple-gates.c, drivers/clk/sunxi/clk-sun8i-bus-gates.c Acked-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> # drivers/gpio/gpio-brcmstb.c Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> # drivers/irqchip/irq-atmel-aic-common.c Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> # drivers/iio/adc/ti_am335x_adc.c Acked-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com> # drivers/pwm/pwm-samsung.c Acked-by: Richard Leitner <richard.leitner@linux.dev> # drivers/usb/misc/usb251xb.c Acked-by: Mark Brown <broonie@kernel.org> # sound/soc/codecs/arizona.c Reviewed-by: Richard Fitzgerald <rf@opensource.cirrus.com> # sound/soc/codecs/arizona.c Acked-by: Michael Ellerman <mpe@ellerman.id.au> # arch/powerpc/sysdev/xive/spapr.c Acked-by: Stephen Boyd <sboyd@kernel.org> # clk Signed-off-by: Luca Ceresoli <luca.ceresoli@bootlin.com> Acked-by: Lee Jones <lee@kernel.org> Link: https://lore.kernel.org/r/20240724-of_property_for_each_u32-v3-1-bea82ce429e2@bootlin.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2024-07-08clk: qcom: common: Add interconnect clocks supportVaradarajan Narayanan
Unlike MSM platforms that manage NoC related clocks and scaling from RPM, IPQ SoCs dont involve RPM in managing NoC related clocks and there is no NoC scaling. However, there is a requirement to enable some NoC interface clocks for accessing the peripheral controllers present on these NoCs. Though exposing these as normal clocks would work, having a minimalistic interconnect driver to handle these clocks would make it consistent with other Qualcomm platforms resulting in common code paths. This is similar to msm8996-cbf's usage of icc-clk framework. Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com> Link: https://lore.kernel.org/r/20240430064214.2030013-5-quic_varada@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-06-12clk: qcom: common: commonize qcom_cc_really_probeLuo Jie
The previous wrapper qcom_cc_really_probe takes the platform device as parameter, which is limited to platform driver. As for qca8k clock controller driver, which is registered as the MDIO device, which also follows the qcom clock framework. To commonize qcom_cc_really_probe, updating it to take the struct device as parameter, so that the qcom_cc_really_probe can be utilized by the previous platform device and the new added MDIO device. Also update the current clock controller drivers to take &pdev->dev as parameter when calling qcom_cc_really_probe. Reviewed-by: Stephen Boyd <sboyd@kernel.org> Tested-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Luo Jie <quic_luoj@quicinc.com> Link: https://lore.kernel.org/r/20240605124541.2711467-4-quic_luoj@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-05-26clk: qcom: add missing MODULE_DESCRIPTION() macrosJeff Johnson
Fix the following from 'make W=1' with allmodconfig: WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/clk/qcom/clk-qcom.o WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/clk/qcom/gcc-msm8976.o WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/clk/qcom/lpass-gfm-sm8250.o WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/clk/qcom/videocc-sdm845.o Signed-off-by: Jeff Johnson <quic_jjohnson@quicinc.com> Link: https://lore.kernel.org/r/20240516-qcom-clk-md-v1-1-baca27dd2fb2@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-04-27clk: qcom: clk-rcg2: add support for rcg2 freq multi opsChristian Marangi
Some RCG frequency can be reached by multiple configuration. Add clk_rcg2_fm_ops ops to support these special RCG configurations. These alternative ops will select the frequency using a CEIL policy. When the correct frequency is found, the correct config is selected by calculating the final rate (by checking the defined parent and values in the config that is being checked) and deciding based on the one that is less different than the requested one. These check are skipped if there is just one config for the requested freq. qcom_find_freq_multi is added to search the freq with the new struct freq_multi_tbl. __clk_rcg2_select_conf is used to select the correct conf by simulating the final clock. If a conf can't be found due to parent not reachable, a WARN is printed and -EINVAL is returned. Tested-by: Wei Lei <quic_leiwei@quicinc.com> Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Acked-by: Stephen Boyd <sboyd@kernel.org> Link: https://lore.kernel.org/r/20231220221724.3822-3-ansuelsmth@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2021-12-02clk: qcom: regmap-mux: fix parent clock lookupDmitry Baryshkov
The function mux_get_parent() uses qcom_find_src_index() to find the parent clock index, which is incorrect: qcom_find_src_index() uses src enum for the lookup, while mux_get_parent() should use cfg field (which corresponds to the register value). Add qcom_find_cfg_index() function doing this kind of lookup and use it for mux parent lookup. Fixes: df964016490b ("clk: qcom: add parent map for regmap mux") Cc: stable@vger.kernel.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20211115233407.1046179-1-dmitry.baryshkov@linaro.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-09-14clk: qcom: common: Make use of the helper function ↵Cai Huoqing
devm_platform_ioremap_resource() Use the devm_platform_ioremap_resource() helper instead of calling platform_get_resource() and devm_ioremap_resource() separately Signed-off-by: Cai Huoqing <caihuoqing@baidu.com> Link: https://lore.kernel.org/r/20210907084851.4050-1-caihuoqing@baidu.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-11-07clk: qcom: Allow constant ratio freq tables for rcgJeffrey Hugo
Some RCGs (the gfx_3d_src_clk in msm8998 for example) are basically just some constant ratio from the input across the entire frequency range. It would be great if we could specify the frequency table as a single entry constant ratio instead of a long list, ie: { .src = P_GPUPLL0_OUT_EVEN, .pre_div = 3 }, { } So, lets support that. We need to fix a corner case in qcom_find_freq() where if the freq table is non-null, but has no frequencies, we end up returning an "entry" before the table array, which is bad. Then, we need ignore the freq from the table, and instead base everything on the requested freq. Suggested-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com> Link: https://lkml.kernel.org/r/20191031185715.15504-1-jeffrey.l.hugo@gmail.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-11-07clk: qcom: common: Return NULL from clk_hw OF providerTaniya Das
Return NULL in the cases where the clk_hw is not registered with the clock provider, but the clock consumer still requests for a clock id. Signed-off-by: Taniya Das <tdas@codeaurora.org> Link: https://lkml.kernel.org/r/20191014102308.27441-3-tdas@codeaurora.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-08-08clk: qcom: define probe by index API as common APIGovind Singh
Extend the probe by index API in common code to be used by other qcom clock controller. Signed-off-by: Govind Singh <govinds@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-02-22clk: qcom: Make common clk_hw registrationsJeffrey Hugo
Several clock controller drivers define a list of clk_hw devices, and then register those devices in probe() before using common code to process the rest of initialization. Extend the common code to accept a list of clk_hw devices to process, thus eliminating many duplicate implementations. Signed-off-by: Jeffrey Hugo <jhugo@codeaurora.org> Suggested-by: Stephen Boyd <sboyd@kernel.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Tested-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-11-21clk: qcom: Support 'protected-clocks' propertyStephen Boyd
Certain firmware configurations "protect" clks and cause the entire system to reboot when a non-secure OS such as Linux tries to read or write protected clk registers. But other firmware configurations allow reading or writing the same registers, and they may actually require that the OS use the otherwise locked down clks. Support the 'protected-clocks' property by never registering these protected clks with the common clk framework. This way, when firmware is protecting these clks we won't have the chance to ever read or write these registers and take down the entire system. Cc: Taniya Das <tdas@codeaurora.org> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-07-25clk: qcom: Update SPDX headers for common filesTaniya Das
SPDX headers updated for common/branch/pll/regmap files. Signed-off-by: Taniya Das <tdas@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-06-01clk: qcom: Register the gdscs before the clocksRajendra Nayak
We have atleast some instances of ALWAYS_ON gdscs, which need to be turned ON *before* some clocks within the gdsc domain marked with a CLK_IS_CRITICAL can be turned ON. To facilitate this sequence, register the GDCSs (and hence handle the ALWAYS_ON gdscs) before we register clocks (and handle the clocks marked as CLK_IS_CRITICAL) Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Tested-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2017-11-14clk: qcom: common: fix legacy board-clock registrationJohan Hovold
Make sure to search only the child nodes of "/clocks", rather than the whole device-tree depth-first starting at "/clocks" when determining whether to register a fixed clock in the legacy board-clock registration helper. Fixes: ee15faffef11 ("clk: qcom: common: Add API to register board clocks backwards compatibly") Signed-off-by: Johan Hovold <johan@kernel.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-11-01clk: qcom: common: Migrate to devm_* APIs for resets and clk providersStephen Boyd
Now that we have devm APIs for the reset controller and of clk hw provider APIs we can remove the custom code here. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-05-08scripts/spelling.txt: add regsiter -> register spelling mistakeStephen Boyd
This typo is quite common. Fix it and add it to the spelling file so that checkpatch catches it earlier. Link: http://lkml.kernel.org/r/20170317011131.6881-2-sboyd@codeaurora.org Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2017-02-15clk: qcom: Do not drop device node twiceGuenter Roeck
of_find_node_by_name() drops the reference to a passed device node. It is not necessary to drop it again, and doing so may result in the device node being released prematurely. Cc: Rob Herring <robh@kernel.org> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Fixes: ee15faffef11 ("clk: qcom: common: Add API to register board clocks backwards compatibly") Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-11-23clk: qcom: Add rcg ops to return floor value closest to the requested rateRajendra Nayak
The default behaviour with clk_rcg2_ops is for the clk_round_rate()/clk_set_rate() to return/set a ceil clock rate closest to the requested rate by looking up the corresponding frequency table. However, we do have some instances (mainly sdcc on various platforms) of clients expecting a clk_set_rate() to set a floor value instead. Add a new clk_rcg2_floor_ops to handle this for such specific rcg instances Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-11-10Merge branch 'clk-qcom-rpm' into clk-nextStephen Boyd
* clk-qcom-rpm: clk: qcom: Add support for RPM Clocks clk: qcom: Add support for SMD-RPM Clocks clk: qcom: Always add factor clock for xo clocks
2016-11-10clk: qcom: Always add factor clock for xo clocksGeorgi Djakov
Currently the RPM/RPM-SMD clock drivers do not register the xo clocks, so we should always add factor clock. When we later add xo clocks support into the drivers, we should update this function to skip registration. By doing so we avoid any DT dependencies. Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-11-01clk: qcom: Enable FSM mode for votable alpha PLLsRajendra Nayak
The votable alpha PLLs need to have the fsm mode enabled as part of the initialization. The sequence seems to be the same as used by clk-pll, so move the function which does this into a common place and reuse it for the clk-alpha-pll Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Signed-off-by: Taniya Das <tdas@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-08-24clk: qcom: Migrate to clk_hw based registration and OF APIsStephen Boyd
Now that we have clk_hw based provider APIs to register clks, we can get rid of struct clk pointers in this driver, allowing us to move closer to a clear split of consumer and provider clk APIs. Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-03-04clk: qcom: Remove CLK_IS_ROOTStephen Boyd
This flag is a no-op now. Remove usage of the flag. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-02-11clk: qcom: gdsc: Add support for hierarchical power domainsRajendra Nayak
Some qcom SoCs' can have hierarchical power domains. Let the gdsc structs specify the parents (if any) and the driver add genpd subdomains for them. Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-02-08clk: qcom: common: check for failureSudip Mukherjee
We were not checking the return from devm_add_action() which can fail. Start using the helper and devm_add_action_or_reset() and return directly as we know that the cleanup has been done by this helper. Signed-off-by: Sudip Mukherjee <sudip@vectorindia.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-11-16clk: qcom: common: Add API to register board clocks backwards compatiblyStephen Boyd
We want to put the XO board clocks into the dt files, but we also need to be backwards compatible with an older dtb. Add an API to the common code to do this. This also makes a place for us to handle the case when the RPM clock driver is enabled and we don't want to register the fixed factor clock. Cc: Georgi Djakov <georgi.djakov@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-10-08clk: qcom: Drop calls to qcom_cc_remove()Stephen Boyd
Now that qcom_cc_remove() is a nop, drop calls to qcom_cc_remove() and any empty driver remove functions. Cc: Rajendra Nayak <rnayak@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-10-08qcom: clk: Make qcom_cc_probe() fully devm safeStephen Boyd
Some APIs in qcom_cc_probe() don't have a devm counterpart, so we have to use the calling device's platform data to pass pointers to the remove path. Let's use devm_add_action() instead, so that the remove path doesn't need to do anything, allowing us to remove qcom_cc_remove() entirely. Cc: Rajendra Nayak <rnayak@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-09-16clk: qcom: gdsc: Add support for ON only stateRajendra Nayak
Certain devices can have GDSCs' which support ON as the only state. They can't be power collapsed to either hit RET or OFF. The clients drivers for these GDSCs' however would expect the state of the core to be reset following a GDSC disable and re-enable. To do this assert/deassert reset lines every time the client driver would request the GDSC to be powered on/off instead. Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-09-16clk: qcom: gdsc: Prepare common clk probe to register gdscsRajendra Nayak
The common clk probe registers a clk provider and a reset controller. Update it to register a genpd provider using the gdsc data provided by each platform. Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-08-24clk: Replace __clk_get_num_parents with clk_hw_get_num_parents()Stephen Boyd
Mostly converted with the following semantic patch: @@ struct clk_hw *E; @@ -__clk_get_num_parents(E->clk) +clk_hw_get_num_parents(E) Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Cc: Chao Xie <chao.xie@marvell.com> Cc: Krzysztof Kozlowski <k.kozlowski@samsung.com> Cc: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Cc: Tomasz Figa <tomasz.figa@gmail.com> Cc: Maxime Ripard <maxime.ripard@free-electrons.com> Cc: "Emilio López" <emilio@elopez.com.ar> Acked-by: Tero Kristo <t-kristo@ti.com> Cc: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-28clk: qcom: Give clk-qcom.ko module a GPLv2 licenseStephen Boyd
The missing license causes the clk-qcom.ko module to taint the kernel. Add the appropriate license to avoid taint. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-03-23clk: qcom: Introduce parent_map tablesGeorgi Djakov
In the current parent mapping code, we can get duplicate or inconsistent indexes, which leads to discrepancy between the number of elements in the array and the number of parents. Until now, this was solved with some reordering but this is not always possible. This patch introduces index tables that are used to define the relations between the PLL source and the hardware mux configuration value. To accomplish this, here we do the following: - Define a parent_map struct to map the relations between PLL source index and register configuration value. - Add a qcom_find_src_index() function for finding the index of a clock matching the specific PLL configuration. - Update the {set,get}_parent RCG functions use the newly introduced parent_map struct. - Convert all existing drivers to the new parent_map tables. Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2014-09-22clk: qcom: Consolidate frequency finding logicStephen Boyd
There are two find_freq() functions in clk-rcg.c and clk-rcg2.c that are almost exactly the same. Consolidate them into one function to save on some code space. Cc: Mike Turquette <mturquette@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2014-07-15clk: qcom: Fix PLL rate configurationsStephen Boyd
Sometimes we need to program PLLs with a fixed rate configuration during driver probe. Doing this after we register the PLLs with the clock framework causes the common clock framework to assume the rate of the PLLs are 0. This causes all sorts of problems for rate recalculations because the common clock framework caches the rate once at registration time unless a flag is set to always recalculate the rates. Split the qcom_cc_probe() function into two pieces, map and everything else, so that drivers which need to configure some PLL rates or otherwise twiddle bits in the clock controller can do so before registering clocks. This allows us to properly detect the rates of PLLs that are programmed at boot. Fixes: 49fc825f0cc2 "clk: qcom: Consolidate common probe code" Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2014-05-29clk: qcom: Return error pointers for unimplemented clocksStephen Boyd
Not all clocks are implemented but client drivers can still request them. Currently we will return a NULL pointer to them if the clock isn't implemented in software but NULL pointers are valid clock pointers. Return an error pointer so that driver's don't proceed without a clock they may actually need. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-04-30clk: qcom: Consolidate common probe codeStephen Boyd
Most of the probe code is the same between all the different clock controllers. Consolidate the code into a common.c file. This makes changes to the common probe parts easier and reduces chances for bugs. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>