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cpufeature.h
Age
Commit message (
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Author
2025-06-04
riscv: misaligned: add a function to check misalign trap delegability
Clément Léger
2025-06-04
riscv: misaligned: declare misaligned_access_speed under CONFIG_RISCV_MISALIGNED
Clément Léger
2025-06-04
riscv: misaligned: request misaligned exception from SBI
Clément Léger
2025-04-01
Merge patch series "Add some validation for vector, vector crypto and fp stuff"
Alexandre Ghiti
2025-03-25
RISC-V: add vector extension validation checks
Conor Dooley
2025-03-19
riscv: Annotate unaligned access init functions
Andrew Jones
2025-01-18
riscv: vector: Use vlenb from DT for thead
Charlie Jenkins
2024-11-11
Merge patch series "Zacas/Zabha support and qspinlocks"
Palmer Dabbelt
2024-11-11
riscv: Move cpufeature.h macros into their own header
Alexandre Ghiti
2024-10-18
Merge patch series "RISC-V: Detect and report speed of unaligned vector acces...
Palmer Dabbelt
2024-10-18
RISC-V: Detect unaligned vector accesses supported
Jesse Taube
2024-10-18
RISC-V: Replace RISCV_MISALIGNED with RISCV_SCALAR_MISALIGNED
Jesse Taube
2024-10-18
RISC-V: Check scalar unaligned access on all CPUs
Jesse Taube
2024-10-05
riscv: Call riscv_user_isa_enable() only on the boot hart
Samuel Holland
2024-07-22
riscv: cpufeature: Extract common elements from extension checking
Charlie Jenkins
2024-07-22
riscv: Extend cpufeature.c to detect vendor extensions
Charlie Jenkins
2024-06-26
riscv: add ISA extensions validation callback
Clément Léger
2024-03-22
Merge tag 'riscv-for-linus-6.9-mw2' of git://git.kernel.org/pub/scm/linux/ker...
Linus Torvalds
2024-03-13
riscv: Set unaligned access speed at compile time
Charlie Jenkins
2024-03-13
riscv: Decouple emulated unaligned accesses from access speed
Charlie Jenkins
2024-03-13
riscv: lib: Introduce has_fast_unaligned_access()
Charlie Jenkins
2024-02-09
work around gcc bugs with 'asm goto' with outputs
Linus Torvalds
2024-01-17
Merge patch series "riscv: Add fine-tuned checksum functions"
Palmer Dabbelt
2024-01-17
riscv: Add static key for misaligned accesses
Charlie Jenkins
2023-12-12
riscv: add ISA extension parsing for scalar crypto
Evan Green
2023-11-09
riscv: Rearrange hwcap.h and cpufeature.h
Xiao Wang
2023-11-07
RISC-V: Probe misaligned access speed in parallel
Evan Green
2023-11-05
Merge patch series "Add support to handle misaligned accesses in S-mode"
Palmer Dabbelt
2023-11-01
riscv: report misaligned accesses emulation to hwprobe
Clément Léger
2023-09-21
RISC-V: Enable cbo.zero in usermode
Andrew Jones
2023-09-01
RISC-V: Probe for unaligned access speed
Evan Green
2023-06-19
RISC-V: Track ISA extensions per hart
Evan Green
2023-04-18
RISC-V: hwprobe: Support probing of misaligned access performance
Evan Green
2023-04-18
RISC-V: Move struct riscv_cpuinfo to new header
Evan Green