diff options
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 17 | 
1 files changed, 7 insertions, 10 deletions
| diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c index 3cabceee5f57..39405f0db824 100644 --- a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c @@ -1761,23 +1761,21 @@ static const struct amdgpu_ring_funcs vcn_v3_0_dec_sw_ring_vm_funcs = {  	.emit_reg_write_reg_wait = amdgpu_ring_emit_reg_write_reg_wait_helper,  }; -static int vcn_v3_0_limit_sched(struct amdgpu_cs_parser *p, -				struct amdgpu_job *job) +static int vcn_v3_0_limit_sched(struct amdgpu_cs_parser *p)  {  	struct drm_gpu_scheduler **scheds;  	/* The create msg must be in the first IB submitted */ -	if (atomic_read(&job->base.entity->fence_seq)) +	if (atomic_read(&p->entity->fence_seq))  		return -EINVAL;  	scheds = p->adev->gpu_sched[AMDGPU_HW_IP_VCN_DEC]  		[AMDGPU_RING_PRIO_DEFAULT].sched; -	drm_sched_entity_modify_sched(job->base.entity, scheds, 1); +	drm_sched_entity_modify_sched(p->entity, scheds, 1);  	return 0;  } -static int vcn_v3_0_dec_msg(struct amdgpu_cs_parser *p, struct amdgpu_job *job, -			    uint64_t addr) +static int vcn_v3_0_dec_msg(struct amdgpu_cs_parser *p, uint64_t addr)  {  	struct ttm_operation_ctx ctx = { false, false };  	struct amdgpu_bo_va_mapping *map; @@ -1848,7 +1846,7 @@ static int vcn_v3_0_dec_msg(struct amdgpu_cs_parser *p, struct amdgpu_job *job,  		if (create[0] == 0x7 || create[0] == 0x10 || create[0] == 0x11)  			continue; -		r = vcn_v3_0_limit_sched(p, job); +		r = vcn_v3_0_limit_sched(p);  		if (r)  			goto out;  	} @@ -1862,7 +1860,7 @@ static int vcn_v3_0_ring_patch_cs_in_place(struct amdgpu_cs_parser *p,  					   struct amdgpu_job *job,  					   struct amdgpu_ib *ib)  { -	struct amdgpu_ring *ring = to_amdgpu_ring(job->base.sched); +	struct amdgpu_ring *ring = to_amdgpu_ring(p->entity->rq->sched);  	uint32_t msg_lo = 0, msg_hi = 0;  	unsigned i;  	int r; @@ -1881,8 +1879,7 @@ static int vcn_v3_0_ring_patch_cs_in_place(struct amdgpu_cs_parser *p,  			msg_hi = val;  		} else if (reg == PACKET0(p->adev->vcn.internal.cmd, 0) &&  			   val == 0) { -			r = vcn_v3_0_dec_msg(p, job, -					     ((u64)msg_hi) << 32 | msg_lo); +			r = vcn_v3_0_dec_msg(p, ((u64)msg_hi) << 32 | msg_lo);  			if (r)  				return r;  		} | 
