diff options
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/calcs')
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c | 6 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c | 18 |
2 files changed, 19 insertions, 5 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c b/drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c index 1ef0074302c5..41284e263325 100644 --- a/drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c +++ b/drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c @@ -805,7 +805,7 @@ void mode_support_and_system_configuration(struct dcn_bw_internal_vars *v) if (v->pte_enable == dcn_bw_yes && v->dcc_enable[k] == dcn_bw_yes) { v->time_for_meta_pte_without_immediate_flip = dcn_bw_max3( - v->meta_pte_bytes_frame[k] / v->prefetch_bandwidth[k], + v->meta_pte_bytes_frame[k] / v->prefetch_bw[k], v->extra_latency, v->htotal[k] / v->pixel_clock[k] / 4.0); } else { @@ -814,7 +814,7 @@ void mode_support_and_system_configuration(struct dcn_bw_internal_vars *v) if (v->pte_enable == dcn_bw_yes || v->dcc_enable[k] == dcn_bw_yes) { v->time_for_meta_and_dpte_row_without_immediate_flip = dcn_bw_max3(( - v->meta_row_bytes[k] + v->dpte_bytes_per_row[k]) / v->prefetch_bandwidth[k], + v->meta_row_bytes[k] + v->dpte_bytes_per_row[k]) / v->prefetch_bw[k], v->htotal[k] / v->pixel_clock[k] - v->time_for_meta_pte_without_immediate_flip, v->extra_latency); } else { @@ -827,7 +827,7 @@ void mode_support_and_system_configuration(struct dcn_bw_internal_vars *v) v->lines_for_meta_and_dpte_row_without_immediate_flip[k] =dcn_bw_floor2(4.0 * (v->time_for_meta_and_dpte_row_without_immediate_flip / (v->htotal[k] / v->pixel_clock[k]) + 0.125), 1.0) / 4; v->maximum_vstartup = v->maximum_vstartup - 1; - if (v->lines_for_meta_pte_without_immediate_flip[k] < 8.0 && v->lines_for_meta_and_dpte_row_without_immediate_flip[k] < 16.0) + if (v->lines_for_meta_pte_without_immediate_flip[k] < 32.0 && v->lines_for_meta_and_dpte_row_without_immediate_flip[k] < 16.0) break; } while(1); diff --git a/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c b/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c index 1e5a92b192a1..51397b565ddf 100644 --- a/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c +++ b/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c @@ -302,10 +302,17 @@ static void pipe_ctx_to_e2e_pipe_params ( struct _vcs_dpi_display_pipe_params_st *input) { input->src.is_hsplit = false; - if (pipe->top_pipe != NULL && pipe->top_pipe->plane_state == pipe->plane_state) + + /* stereo can never be split */ + if (pipe->plane_state->stereo_format == PLANE_STEREO_FORMAT_SIDE_BY_SIDE || + pipe->plane_state->stereo_format == PLANE_STEREO_FORMAT_TOP_AND_BOTTOM) { + /* reset the split group if it was already considered split. */ + input->src.hsplit_grp = pipe->pipe_idx; + } else if (pipe->top_pipe != NULL && pipe->top_pipe->plane_state == pipe->plane_state) { input->src.is_hsplit = true; - else if (pipe->bottom_pipe != NULL && pipe->bottom_pipe->plane_state == pipe->plane_state) + } else if (pipe->bottom_pipe != NULL && pipe->bottom_pipe->plane_state == pipe->plane_state) { input->src.is_hsplit = true; + } if (pipe->plane_res.dpp->ctx->dc->debug.optimized_watermark) { /* @@ -374,6 +381,13 @@ static void pipe_ctx_to_e2e_pipe_params ( input->src.viewport_width_c = input->src.viewport_width; input->src.viewport_height_c = input->src.viewport_height; break; +#if defined(CONFIG_DRM_AMD_DC_DCN3_0) + case SURFACE_PIXEL_FORMAT_GRPH_RGBE_ALPHA: + input->src.source_format = dm_rgbe_alpha; + input->src.viewport_width_c = input->src.viewport_width; + input->src.viewport_height_c = input->src.viewport_height; + break; +#endif default: input->src.source_format = dm_444_32; input->src.viewport_width_c = input->src.viewport_width; |