diff options
Diffstat (limited to 'drivers/gpu/drm/amd/display/amdgpu_dm')
| -rw-r--r-- | drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 13 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 6 | 
2 files changed, 13 insertions, 6 deletions
| diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c index e2b23486ba4c..9b6809f309f4 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c @@ -100,6 +100,8 @@ MODULE_FIRMWARE(FIRMWARE_SIENNA_CICHLID_DMUB);  #define FIRMWARE_NAVY_FLOUNDER_DMUB "amdgpu/navy_flounder_dmcub.bin"  MODULE_FIRMWARE(FIRMWARE_NAVY_FLOUNDER_DMUB);  #endif +#define FIRMWARE_GREEN_SARDINE_DMUB "amdgpu/green_sardine_dmcub.bin" +MODULE_FIRMWARE(FIRMWARE_GREEN_SARDINE_DMUB);  #define FIRMWARE_RAVEN_DMCU		"amdgpu/raven_dmcu.bin"  MODULE_FIRMWARE(FIRMWARE_RAVEN_DMCU); @@ -583,7 +585,7 @@ static void amdgpu_dm_fbc_init(struct drm_connector *connector)  {  	struct drm_device *dev = connector->dev;  	struct amdgpu_device *adev = drm_to_adev(dev); -	struct dm_comressor_info *compressor = &adev->dm.compressor; +	struct dm_compressor_info *compressor = &adev->dm.compressor;  	struct amdgpu_dm_connector *aconn = to_amdgpu_dm_connector(connector);  	struct drm_display_mode *mode;  	unsigned long max_size = 0; @@ -973,6 +975,8 @@ static int amdgpu_dm_init(struct amdgpu_device *adev)  	case CHIP_RAVEN:  	case CHIP_RENOIR:  		init_data.flags.gpu_vm_support = true; +		if (ASICREV_IS_GREEN_SARDINE(adev->external_rev_id)) +			init_data.flags.disable_dmcu = true;  		break;  	default:  		break; @@ -1037,7 +1041,7 @@ static int amdgpu_dm_init(struct amdgpu_device *adev)  	amdgpu_dm_init_color_mod();  #ifdef CONFIG_DRM_AMD_DC_HDCP -	if (adev->asic_type >= CHIP_RAVEN) { +	if (adev->dm.dc->caps.max_links > 0 && adev->asic_type >= CHIP_RAVEN) {  		adev->dm.hdcp_workqueue = hdcp_create_workqueue(adev, &init_params.cp_psp, adev->dm.dc);  		if (!adev->dm.hdcp_workqueue) @@ -1267,6 +1271,8 @@ static int dm_dmub_sw_init(struct amdgpu_device *adev)  	case CHIP_RENOIR:  		dmub_asic = DMUB_ASIC_DCN21;  		fw_name_dmub = FIRMWARE_RENOIR_DMUB; +		if (ASICREV_IS_GREEN_SARDINE(adev->external_rev_id)) +			fw_name_dmub = FIRMWARE_GREEN_SARDINE_DMUB;  		break;  #if defined(CONFIG_DRM_AMD_DC_DCN3_0)  	case CHIP_SIENNA_CICHLID: @@ -7500,7 +7506,6 @@ static void amdgpu_dm_atomic_commit_tail(struct drm_atomic_state *state)  	bool mode_set_reset_required = false;  	drm_atomic_helper_update_legacy_modeset_state(dev, state); -	drm_atomic_helper_calc_timestamping_constants(state);  	dm_state = dm_atomic_get_new_state(state);  	if (dm_state && dm_state->context) { @@ -7527,6 +7532,8 @@ static void amdgpu_dm_atomic_commit_tail(struct drm_atomic_state *state)  		}  	} +	drm_atomic_helper_calc_timestamping_constants(state); +  	/* update changed items */  	for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {  		struct amdgpu_crtc *acrtc = to_amdgpu_crtc(crtc); diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h index 34f6369bf51f..a8a0e8cb1a11 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h @@ -86,7 +86,7 @@ struct irq_list_head {   * @bo_ptr: Pointer to the buffer object   * @gpu_addr: MMIO gpu addr   */ -struct dm_comressor_info { +struct dm_compressor_info {  	void *cpu_addr;  	struct amdgpu_bo *bo_ptr;  	uint64_t gpu_addr; @@ -148,7 +148,7 @@ struct amdgpu_dm_backlight_caps {   * @soc_bounding_box: SOC bounding box values provided by gpu_info FW   * @cached_state: Caches device atomic state for suspend/resume   * @cached_dc_state: Cached state of content streams - * @compressor: Frame buffer compression buffer. See &struct dm_comressor_info + * @compressor: Frame buffer compression buffer. See &struct dm_compressor_info   * @force_timing_sync: set via debugfs. When set, indicates that all connected   *		       displays will be forced to synchronize.   */ @@ -324,7 +324,7 @@ struct amdgpu_display_manager {  	struct drm_atomic_state *cached_state;  	struct dc_state *cached_dc_state; -	struct dm_comressor_info compressor; +	struct dm_compressor_info compressor;  	const struct firmware *fw_dmcu;  	uint32_t dmcu_fw_version; | 
