diff options
Diffstat (limited to 'drivers/clk/qcom/clk-rpmh.c')
| -rw-r--r-- | drivers/clk/qcom/clk-rpmh.c | 28 |
1 files changed, 25 insertions, 3 deletions
diff --git a/drivers/clk/qcom/clk-rpmh.c b/drivers/clk/qcom/clk-rpmh.c index 1496fb3de4be..63c38cb47bc4 100644 --- a/drivers/clk/qcom/clk-rpmh.c +++ b/drivers/clk/qcom/clk-rpmh.c @@ -87,7 +87,7 @@ static DEFINE_MUTEX(rpmh_clk_lock); .hw.init = &(struct clk_init_data){ \ .ops = &clk_rpmh_ops, \ .name = #_name, \ - .parent_data = &(const struct clk_parent_data){ \ + .parent_data = &(const struct clk_parent_data){ \ .fw_name = "xo", \ .name = "xo_board", \ }, \ @@ -105,7 +105,7 @@ static DEFINE_MUTEX(rpmh_clk_lock); .hw.init = &(struct clk_init_data){ \ .ops = &clk_rpmh_ops, \ .name = #_name "_ao", \ - .parent_data = &(const struct clk_parent_data){ \ + .parent_data = &(const struct clk_parent_data){ \ .fw_name = "xo", \ .name = "xo_board", \ }, \ @@ -182,7 +182,7 @@ static int clk_rpmh_send_aggregate_command(struct clk_rpmh *c) } c->last_sent_aggr_state = c->aggr_state; - c->peer->last_sent_aggr_state = c->last_sent_aggr_state; + c->peer->last_sent_aggr_state = c->last_sent_aggr_state; return 0; } @@ -390,6 +390,11 @@ DEFINE_CLK_RPMH_VRM(clk7, _a4, "clka7", 4); DEFINE_CLK_RPMH_VRM(div_clk1, _div2, "divclka1", 2); +DEFINE_CLK_RPMH_VRM(clk3, _a, "C3A_E0", 1); +DEFINE_CLK_RPMH_VRM(clk4, _a, "C4A_E0", 1); +DEFINE_CLK_RPMH_VRM(clk5, _a, "C5A_E0", 1); +DEFINE_CLK_RPMH_VRM(clk8, _a, "C8A_E0", 1); + DEFINE_CLK_RPMH_BCM(ce, "CE0"); DEFINE_CLK_RPMH_BCM(hwkm, "HK0"); DEFINE_CLK_RPMH_BCM(ipa, "IP0"); @@ -879,6 +884,22 @@ static const struct clk_rpmh_desc clk_rpmh_sm8750 = { .clka_optional = true, }; +static struct clk_hw *glymur_rpmh_clocks[] = { + [RPMH_CXO_CLK] = &clk_rpmh_bi_tcxo_div2.hw, + [RPMH_CXO_CLK_A] = &clk_rpmh_bi_tcxo_div2_ao.hw, + [RPMH_RF_CLK3] = &clk_rpmh_clk3_a.hw, + [RPMH_RF_CLK3_A] = &clk_rpmh_clk3_a_ao.hw, + [RPMH_RF_CLK4] = &clk_rpmh_clk4_a.hw, + [RPMH_RF_CLK4_A] = &clk_rpmh_clk4_a_ao.hw, + [RPMH_RF_CLK5] = &clk_rpmh_clk5_a.hw, + [RPMH_RF_CLK5_A] = &clk_rpmh_clk5_a_ao.hw, +}; + +static const struct clk_rpmh_desc clk_rpmh_glymur = { + .clks = glymur_rpmh_clocks, + .num_clks = ARRAY_SIZE(glymur_rpmh_clocks), +}; + static struct clk_hw *of_clk_rpmh_hw_get(struct of_phandle_args *clkspec, void *data) { @@ -968,6 +989,7 @@ static int clk_rpmh_probe(struct platform_device *pdev) } static const struct of_device_id clk_rpmh_match_table[] = { + { .compatible = "qcom,glymur-rpmh-clk", .data = &clk_rpmh_glymur}, { .compatible = "qcom,milos-rpmh-clk", .data = &clk_rpmh_milos}, { .compatible = "qcom,qcs615-rpmh-clk", .data = &clk_rpmh_qcs615}, { .compatible = "qcom,qdu1000-rpmh-clk", .data = &clk_rpmh_qdu1000}, |