diff options
Diffstat (limited to 'drivers/clk/mediatek/clk-pll.h')
| -rw-r--r-- | drivers/clk/mediatek/clk-pll.h | 11 |
1 files changed, 9 insertions, 2 deletions
diff --git a/drivers/clk/mediatek/clk-pll.h b/drivers/clk/mediatek/clk-pll.h index 285c8db958b3..d71c150ce83e 100644 --- a/drivers/clk/mediatek/clk-pll.h +++ b/drivers/clk/mediatek/clk-pll.h @@ -29,6 +29,7 @@ struct mtk_pll_data { u32 reg; u32 pwr_reg; u32 en_mask; + u32 fenc_sta_ofs; u32 pd_reg; u32 tuner_reg; u32 tuner_en_reg; @@ -47,8 +48,11 @@ struct mtk_pll_data { const struct mtk_pll_div_table *div_table; const char *parent_name; u32 en_reg; + u32 en_set_reg; + u32 en_clr_reg; u8 pll_en_bit; /* Assume 0, indicates BIT(0) by default */ u8 pcw_chg_bit; + u8 fenc_sta_bit; }; /* @@ -68,6 +72,9 @@ struct mtk_clk_pll { void __iomem *pcw_addr; void __iomem *pcw_chg_addr; void __iomem *en_addr; + void __iomem *en_set_addr; + void __iomem *en_clr_addr; + void __iomem *fenc_addr; const struct mtk_pll_data *data; }; @@ -78,6 +85,7 @@ void mtk_clk_unregister_plls(const struct mtk_pll_data *plls, int num_plls, struct clk_hw_onecell_data *clk_data); extern const struct clk_ops mtk_pll_ops; +extern const struct clk_ops mtk_pll_fenc_clr_set_ops; static inline struct mtk_clk_pll *to_mtk_clk_pll(struct clk_hw *hw) { @@ -96,8 +104,7 @@ void mtk_pll_calc_values(struct mtk_clk_pll *pll, u32 *pcw, u32 *postdiv, u32 freq, u32 fin); int mtk_pll_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate); -long mtk_pll_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *prate); +int mtk_pll_determine_rate(struct clk_hw *hw, struct clk_rate_request *req); struct clk_hw *mtk_clk_register_pll_ops(struct mtk_clk_pll *pll, const struct mtk_pll_data *data, |