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-rw-r--r--arch/riscv/Kconfig22
-rw-r--r--arch/riscv/Makefile9
-rw-r--r--arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts48
-rw-r--r--arch/riscv/boot/dts/spacemit/k1-milkv-jupiter.dts48
-rw-r--r--arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi48
-rw-r--r--arch/riscv/boot/dts/spacemit/k1.dtsi22
-rw-r--r--arch/riscv/include/asm/cacheflush.h4
-rw-r--r--arch/riscv/include/asm/hugetlb.h2
-rw-r--r--arch/riscv/mm/cacheflush.c4
-rw-r--r--arch/riscv/mm/init.c4
-rw-r--r--arch/riscv/mm/kasan_init.c1
11 files changed, 183 insertions, 29 deletions
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 2181dde50d6e..0c6038dc5dfd 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -16,6 +16,7 @@ config RISCV
select ACPI_MCFG if (ACPI && PCI)
select ACPI_PPTT if ACPI
select ACPI_REDUCED_HARDWARE_ONLY if ACPI
+ select ACPI_RIMT if ACPI
select ACPI_SPCR_TABLE if ACPI
select ARCH_DMA_DEFAULT_COHERENT
select ARCH_ENABLE_HUGEPAGE_MIGRATION if HUGETLB_PAGE && MIGRATION
@@ -66,9 +67,8 @@ config RISCV
select ARCH_SUPPORTS_DEBUG_PAGEALLOC if MMU
select ARCH_SUPPORTS_HUGE_PFNMAP if TRANSPARENT_HUGEPAGE
select ARCH_SUPPORTS_HUGETLBFS if MMU
- # LLD >= 14: https://github.com/llvm/llvm-project/issues/50505
- select ARCH_SUPPORTS_LTO_CLANG if LLD_VERSION >= 140000 && CMODEL_MEDANY
- select ARCH_SUPPORTS_LTO_CLANG_THIN if LLD_VERSION >= 140000
+ select ARCH_SUPPORTS_LTO_CLANG if CMODEL_MEDANY
+ select ARCH_SUPPORTS_LTO_CLANG_THIN
select ARCH_SUPPORTS_MSEAL_SYSTEM_MAPPINGS if 64BIT && MMU
select ARCH_SUPPORTS_PAGE_TABLE_CHECK if MMU
select ARCH_SUPPORTS_PER_VMA_LOCK if MMU
@@ -249,15 +249,9 @@ config HAVE_SHADOW_CALL_STACK
# https://github.com/riscv-non-isa/riscv-elf-psabi-doc/commit/a484e843e6eeb51f0cb7b8819e50da6d2444d769
depends on $(ld-option,--no-relax-gp)
-config RISCV_USE_LINKER_RELAXATION
- def_bool y
- # https://github.com/llvm/llvm-project/commit/6611d58f5bbcbec77262d392e2923e1d680f6985
- depends on !LD_IS_LLD || LLD_VERSION >= 150000
-
# https://github.com/llvm/llvm-project/commit/bbc0f99f3bc96f1db16f649fc21dd18e5b0918f6
config ARCH_HAS_BROKEN_DWARF5
def_bool y
- depends on RISCV_USE_LINKER_RELAXATION
# https://github.com/llvm/llvm-project/commit/1df5ea29b43690b6622db2cad7b745607ca4de6a
depends on AS_IS_LLVM && AS_VERSION < 180000
# https://github.com/llvm/llvm-project/commit/7ffabb61a5569444b5ac9322e22e5471cc5e4a77
@@ -621,7 +615,7 @@ config TOOLCHAIN_HAS_V
default y
depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64imv)
depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32imv)
- depends on LLD_VERSION >= 140000 || LD_VERSION >= 23800
+ depends on LD_IS_LLD || LD_VERSION >= 23800
depends on AS_HAS_OPTION_ARCH
config RISCV_ISA_V
@@ -721,7 +715,7 @@ config TOOLCHAIN_HAS_ZBB
default y
depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64ima_zbb)
depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32ima_zbb)
- depends on LLD_VERSION >= 150000 || LD_VERSION >= 23900
+ depends on LD_IS_LLD || LD_VERSION >= 23900
depends on AS_HAS_OPTION_ARCH
# This symbol indicates that the toolchain supports all v1.0 vector crypto
@@ -736,7 +730,7 @@ config TOOLCHAIN_HAS_ZBA
default y
depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64ima_zba)
depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32ima_zba)
- depends on LLD_VERSION >= 150000 || LD_VERSION >= 23900
+ depends on LD_IS_LLD || LD_VERSION >= 23900
depends on AS_HAS_OPTION_ARCH
config RISCV_ISA_ZBA
@@ -771,7 +765,7 @@ config TOOLCHAIN_HAS_ZBC
default y
depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64ima_zbc)
depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32ima_zbc)
- depends on LLD_VERSION >= 150000 || LD_VERSION >= 23900
+ depends on LD_IS_LLD || LD_VERSION >= 23900
depends on AS_HAS_OPTION_ARCH
config RISCV_ISA_ZBC
@@ -794,7 +788,7 @@ config TOOLCHAIN_HAS_ZBKB
default y
depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64ima_zbkb)
depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32ima_zbkb)
- depends on LLD_VERSION >= 150000 || LD_VERSION >= 23900
+ depends on LD_IS_LLD || LD_VERSION >= 23900
depends on AS_HAS_OPTION_ARCH
config RISCV_ISA_ZBKB
diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile
index df57654a615e..ecf2fcce2d92 100644
--- a/arch/riscv/Makefile
+++ b/arch/riscv/Makefile
@@ -46,17 +46,10 @@ else
KBUILD_LDFLAGS += -melf32lriscv
endif
-ifndef CONFIG_RISCV_USE_LINKER_RELAXATION
- KBUILD_CFLAGS += -mno-relax
- KBUILD_AFLAGS += -mno-relax
-ifndef CONFIG_AS_IS_LLVM
- KBUILD_CFLAGS += -Wa,-mno-relax
- KBUILD_AFLAGS += -Wa,-mno-relax
-endif
# LLVM has an issue with target-features and LTO: https://github.com/llvm/llvm-project/issues/59350
# Ensure it is aware of linker relaxation with LTO, otherwise relocations may
# be incorrect: https://github.com/llvm/llvm-project/issues/65090
-else ifeq ($(CONFIG_LTO_CLANG),y)
+ifeq ($(CONFIG_LTO_CLANG),y)
KBUILD_LDFLAGS += -mllvm -mattr=+c -mllvm -mattr=+relax
endif
diff --git a/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts b/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts
index 6013be258542..2aaaff77831e 100644
--- a/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts
+++ b/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts
@@ -11,6 +11,8 @@
compatible = "bananapi,bpi-f3", "spacemit,k1";
aliases {
+ ethernet0 = &eth0;
+ ethernet1 = &eth1;
serial0 = &uart0;
};
@@ -40,6 +42,52 @@
status = "okay";
};
+&eth0 {
+ phy-handle = <&rgmii0>;
+ phy-mode = "rgmii-id";
+ pinctrl-names = "default";
+ pinctrl-0 = <&gmac0_cfg>;
+ rx-internal-delay-ps = <0>;
+ tx-internal-delay-ps = <0>;
+ status = "okay";
+
+ mdio-bus {
+ #address-cells = <0x1>;
+ #size-cells = <0x0>;
+
+ reset-gpios = <&gpio K1_GPIO(110) GPIO_ACTIVE_LOW>;
+ reset-delay-us = <10000>;
+ reset-post-delay-us = <100000>;
+
+ rgmii0: phy@1 {
+ reg = <0x1>;
+ };
+ };
+};
+
+&eth1 {
+ phy-handle = <&rgmii1>;
+ phy-mode = "rgmii-id";
+ pinctrl-names = "default";
+ pinctrl-0 = <&gmac1_cfg>;
+ rx-internal-delay-ps = <0>;
+ tx-internal-delay-ps = <250>;
+ status = "okay";
+
+ mdio-bus {
+ #address-cells = <0x1>;
+ #size-cells = <0x0>;
+
+ reset-gpios = <&gpio K1_GPIO(115) GPIO_ACTIVE_LOW>;
+ reset-delay-us = <10000>;
+ reset-post-delay-us = <100000>;
+
+ rgmii1: phy@1 {
+ reg = <0x1>;
+ };
+ };
+};
+
&pdma {
status = "okay";
};
diff --git a/arch/riscv/boot/dts/spacemit/k1-milkv-jupiter.dts b/arch/riscv/boot/dts/spacemit/k1-milkv-jupiter.dts
index c615fcadbd33..28afd39b28da 100644
--- a/arch/riscv/boot/dts/spacemit/k1-milkv-jupiter.dts
+++ b/arch/riscv/boot/dts/spacemit/k1-milkv-jupiter.dts
@@ -12,6 +12,8 @@
compatible = "milkv,jupiter", "spacemit,k1";
aliases {
+ ethernet0 = &eth0;
+ ethernet1 = &eth1;
serial0 = &uart0;
};
@@ -20,6 +22,52 @@
};
};
+&eth0 {
+ phy-handle = <&rgmii0>;
+ phy-mode = "rgmii-id";
+ pinctrl-names = "default";
+ pinctrl-0 = <&gmac0_cfg>;
+ rx-internal-delay-ps = <0>;
+ tx-internal-delay-ps = <0>;
+ status = "okay";
+
+ mdio-bus {
+ #address-cells = <0x1>;
+ #size-cells = <0x0>;
+
+ reset-gpios = <&gpio K1_GPIO(110) GPIO_ACTIVE_LOW>;
+ reset-delay-us = <10000>;
+ reset-post-delay-us = <100000>;
+
+ rgmii0: phy@1 {
+ reg = <0x1>;
+ };
+ };
+};
+
+&eth1 {
+ phy-handle = <&rgmii1>;
+ phy-mode = "rgmii-id";
+ pinctrl-names = "default";
+ pinctrl-0 = <&gmac1_cfg>;
+ rx-internal-delay-ps = <0>;
+ tx-internal-delay-ps = <250>;
+ status = "okay";
+
+ mdio-bus {
+ #address-cells = <0x1>;
+ #size-cells = <0x0>;
+
+ reset-gpios = <&gpio K1_GPIO(115) GPIO_ACTIVE_LOW>;
+ reset-delay-us = <10000>;
+ reset-post-delay-us = <100000>;
+
+ rgmii1: phy@1 {
+ reg = <0x1>;
+ };
+ };
+};
+
&pdma {
status = "okay";
};
diff --git a/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi b/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi
index 381055737422..aff19c86d5ff 100644
--- a/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi
+++ b/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi
@@ -11,6 +11,54 @@
#define K1_GPIO(x) (x / 32) (x % 32)
&pinctrl {
+ gmac0_cfg: gmac0-cfg {
+ gmac0-pins {
+ pinmux = <K1_PADCONF(0, 1)>, /* gmac0_rxdv */
+ <K1_PADCONF(1, 1)>, /* gmac0_rx_d0 */
+ <K1_PADCONF(2, 1)>, /* gmac0_rx_d1 */
+ <K1_PADCONF(3, 1)>, /* gmac0_rx_clk */
+ <K1_PADCONF(4, 1)>, /* gmac0_rx_d2 */
+ <K1_PADCONF(5, 1)>, /* gmac0_rx_d3 */
+ <K1_PADCONF(6, 1)>, /* gmac0_tx_d0 */
+ <K1_PADCONF(7, 1)>, /* gmac0_tx_d1 */
+ <K1_PADCONF(8, 1)>, /* gmac0_tx */
+ <K1_PADCONF(9, 1)>, /* gmac0_tx_d2 */
+ <K1_PADCONF(10, 1)>, /* gmac0_tx_d3 */
+ <K1_PADCONF(11, 1)>, /* gmac0_tx_en */
+ <K1_PADCONF(12, 1)>, /* gmac0_mdc */
+ <K1_PADCONF(13, 1)>, /* gmac0_mdio */
+ <K1_PADCONF(14, 1)>, /* gmac0_int_n */
+ <K1_PADCONF(45, 1)>; /* gmac0_clk_ref */
+
+ bias-pull-up = <0>;
+ drive-strength = <21>;
+ };
+ };
+
+ gmac1_cfg: gmac1-cfg {
+ gmac1-pins {
+ pinmux = <K1_PADCONF(29, 1)>, /* gmac1_rxdv */
+ <K1_PADCONF(30, 1)>, /* gmac1_rx_d0 */
+ <K1_PADCONF(31, 1)>, /* gmac1_rx_d1 */
+ <K1_PADCONF(32, 1)>, /* gmac1_rx_clk */
+ <K1_PADCONF(33, 1)>, /* gmac1_rx_d2 */
+ <K1_PADCONF(34, 1)>, /* gmac1_rx_d3 */
+ <K1_PADCONF(35, 1)>, /* gmac1_tx_d0 */
+ <K1_PADCONF(36, 1)>, /* gmac1_tx_d1 */
+ <K1_PADCONF(37, 1)>, /* gmac1_tx */
+ <K1_PADCONF(38, 1)>, /* gmac1_tx_d2 */
+ <K1_PADCONF(39, 1)>, /* gmac1_tx_d3 */
+ <K1_PADCONF(40, 1)>, /* gmac1_tx_en */
+ <K1_PADCONF(41, 1)>, /* gmac1_mdc */
+ <K1_PADCONF(42, 1)>, /* gmac1_mdio */
+ <K1_PADCONF(43, 1)>, /* gmac1_int_n */
+ <K1_PADCONF(46, 1)>; /* gmac1_clk_ref */
+
+ bias-pull-up = <0>;
+ drive-strength = <21>;
+ };
+ };
+
uart0_2_cfg: uart0-2-cfg {
uart0-2-pins {
pinmux = <K1_PADCONF(68, 2)>,
diff --git a/arch/riscv/boot/dts/spacemit/k1.dtsi b/arch/riscv/boot/dts/spacemit/k1.dtsi
index 66b33a9110cc..6cdcd80a7c83 100644
--- a/arch/riscv/boot/dts/spacemit/k1.dtsi
+++ b/arch/riscv/boot/dts/spacemit/k1.dtsi
@@ -816,6 +816,28 @@
#size-cells = <2>;
dma-ranges = <0x0 0x00000000 0x0 0x00000000 0x0 0x80000000>,
<0x0 0x80000000 0x1 0x00000000 0x0 0x80000000>;
+
+ eth0: ethernet@cac80000 {
+ compatible = "spacemit,k1-emac";
+ reg = <0x0 0xcac80000 0x0 0x420>;
+ clocks = <&syscon_apmu CLK_EMAC0_BUS>;
+ interrupts = <131>;
+ mac-address = [ 00 00 00 00 00 00 ];
+ resets = <&syscon_apmu RESET_EMAC0>;
+ spacemit,apmu = <&syscon_apmu 0x3e4>;
+ status = "disabled";
+ };
+
+ eth1: ethernet@cac81000 {
+ compatible = "spacemit,k1-emac";
+ reg = <0x0 0xcac81000 0x0 0x420>;
+ clocks = <&syscon_apmu CLK_EMAC1_BUS>;
+ interrupts = <133>;
+ mac-address = [ 00 00 00 00 00 00 ];
+ resets = <&syscon_apmu RESET_EMAC1>;
+ spacemit,apmu = <&syscon_apmu 0x3ec>;
+ status = "disabled";
+ };
};
pcie-bus {
diff --git a/arch/riscv/include/asm/cacheflush.h b/arch/riscv/include/asm/cacheflush.h
index 6086b38d5427..0092513c3376 100644
--- a/arch/riscv/include/asm/cacheflush.h
+++ b/arch/riscv/include/asm/cacheflush.h
@@ -23,8 +23,8 @@ static inline void local_flush_icache_range(unsigned long start,
static inline void flush_dcache_folio(struct folio *folio)
{
- if (test_bit(PG_dcache_clean, &folio->flags))
- clear_bit(PG_dcache_clean, &folio->flags);
+ if (test_bit(PG_dcache_clean, &folio->flags.f))
+ clear_bit(PG_dcache_clean, &folio->flags.f);
}
#define flush_dcache_folio flush_dcache_folio
#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1
diff --git a/arch/riscv/include/asm/hugetlb.h b/arch/riscv/include/asm/hugetlb.h
index 446126497768..0872d43fc0c0 100644
--- a/arch/riscv/include/asm/hugetlb.h
+++ b/arch/riscv/include/asm/hugetlb.h
@@ -7,7 +7,7 @@
static inline void arch_clear_hugetlb_flags(struct folio *folio)
{
- clear_bit(PG_dcache_clean, &folio->flags);
+ clear_bit(PG_dcache_clean, &folio->flags.f);
}
#define arch_clear_hugetlb_flags arch_clear_hugetlb_flags
diff --git a/arch/riscv/mm/cacheflush.c b/arch/riscv/mm/cacheflush.c
index 4ca5aafce22e..d83a612464f6 100644
--- a/arch/riscv/mm/cacheflush.c
+++ b/arch/riscv/mm/cacheflush.c
@@ -101,9 +101,9 @@ void flush_icache_pte(struct mm_struct *mm, pte_t pte)
{
struct folio *folio = page_folio(pte_page(pte));
- if (!test_bit(PG_dcache_clean, &folio->flags)) {
+ if (!test_bit(PG_dcache_clean, &folio->flags.f)) {
flush_icache_mm(mm, false);
- set_bit(PG_dcache_clean, &folio->flags);
+ set_bit(PG_dcache_clean, &folio->flags.f);
}
}
#endif /* CONFIG_MMU */
diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c
index 6091f3f06fa3..d85efe74a4b6 100644
--- a/arch/riscv/mm/init.c
+++ b/arch/riscv/mm/init.c
@@ -1630,7 +1630,7 @@ static void __meminit free_pud_table(pud_t *pud_start, p4d_t *p4d)
if (PageReserved(page))
free_reserved_page(page);
else
- free_pages((unsigned long)page_address(page), 0);
+ __free_pages(page, 0);
p4d_clear(p4d);
}
@@ -1652,7 +1652,7 @@ static void __meminit free_vmemmap_storage(struct page *page, size_t size,
return;
}
- free_pages((unsigned long)page_address(page), order);
+ __free_pages(page, order);
}
static void __meminit remove_pte_mapping(pte_t *pte_base, unsigned long addr, unsigned long end,
diff --git a/arch/riscv/mm/kasan_init.c b/arch/riscv/mm/kasan_init.c
index 41c635d6aca4..c4a2a9e5586e 100644
--- a/arch/riscv/mm/kasan_init.c
+++ b/arch/riscv/mm/kasan_init.c
@@ -533,4 +533,5 @@ void __init kasan_init(void)
csr_write(CSR_SATP, PFN_DOWN(__pa(swapper_pg_dir)) | satp_mode);
local_flush_tlb_all();
+ kasan_init_generic();
}
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