diff options
Diffstat (limited to 'arch/arm64/include/asm/pgtable.h')
| -rw-r--r-- | arch/arm64/include/asm/pgtable.h | 34 | 
1 files changed, 18 insertions, 16 deletions
| diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h index 4ff12a7adcfd..5628289b9d5e 100644 --- a/arch/arm64/include/asm/pgtable.h +++ b/arch/arm64/include/asm/pgtable.h @@ -115,8 +115,6 @@ extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];  #define pte_valid(pte)		(!!(pte_val(pte) & PTE_VALID))  #define pte_valid_not_user(pte) \  	((pte_val(pte) & (PTE_VALID | PTE_USER)) == PTE_VALID) -#define pte_valid_young(pte) \ -	((pte_val(pte) & (PTE_VALID | PTE_AF)) == (PTE_VALID | PTE_AF))  #define pte_valid_user(pte) \  	((pte_val(pte) & (PTE_VALID | PTE_USER)) == (PTE_VALID | PTE_USER)) @@ -124,9 +122,12 @@ extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];   * Could the pte be present in the TLB? We must check mm_tlb_flush_pending   * so that we don't erroneously return false for pages that have been   * remapped as PROT_NONE but are yet to be flushed from the TLB. + * Note that we can't make any assumptions based on the state of the access + * flag, since ptep_clear_flush_young() elides a DSB when invalidating the + * TLB.   */  #define pte_accessible(mm, pte)	\ -	(mm_tlb_flush_pending(mm) ? pte_present(pte) : pte_valid_young(pte)) +	(mm_tlb_flush_pending(mm) ? pte_present(pte) : pte_valid(pte))  /*   * p??_access_permitted() is true for valid user mappings (subject to the @@ -164,13 +165,6 @@ static inline pmd_t set_pmd_bit(pmd_t pmd, pgprot_t prot)  	return pmd;  } -static inline pte_t pte_wrprotect(pte_t pte) -{ -	pte = clear_pte_bit(pte, __pgprot(PTE_WRITE)); -	pte = set_pte_bit(pte, __pgprot(PTE_RDONLY)); -	return pte; -} -  static inline pte_t pte_mkwrite(pte_t pte)  {  	pte = set_pte_bit(pte, __pgprot(PTE_WRITE)); @@ -196,6 +190,20 @@ static inline pte_t pte_mkdirty(pte_t pte)  	return pte;  } +static inline pte_t pte_wrprotect(pte_t pte) +{ +	/* +	 * If hardware-dirty (PTE_WRITE/DBM bit set and PTE_RDONLY +	 * clear), set the PTE_DIRTY bit. +	 */ +	if (pte_hw_dirty(pte)) +		pte = pte_mkdirty(pte); + +	pte = clear_pte_bit(pte, __pgprot(PTE_WRITE)); +	pte = set_pte_bit(pte, __pgprot(PTE_RDONLY)); +	return pte; +} +  static inline pte_t pte_mkold(pte_t pte)  {  	return clear_pte_bit(pte, __pgprot(PTE_AF)); @@ -845,12 +853,6 @@ static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addres  	pte = READ_ONCE(*ptep);  	do {  		old_pte = pte; -		/* -		 * If hardware-dirty (PTE_WRITE/DBM bit set and PTE_RDONLY -		 * clear), set the PTE_DIRTY bit. -		 */ -		if (pte_hw_dirty(pte)) -			pte = pte_mkdirty(pte);  		pte = pte_wrprotect(pte);  		pte_val(pte) = cmpxchg_relaxed(&pte_val(*ptep),  					       pte_val(old_pte), pte_val(pte)); | 
