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Diffstat (limited to 'arch/arm/boot/dts/qcom/qcom-msm8960.dtsi')
-rw-r--r--arch/arm/boot/dts/qcom/qcom-msm8960.dtsi32
1 files changed, 32 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi
index 203f0b69b353..6e272d5345a8 100644
--- a/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi
+++ b/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi
@@ -322,6 +322,8 @@
syscon-tcsr = <&tcsr>;
+ status = "disabled";
+
gsbi5_serial: serial@16440000 {
compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
reg = <0x16440000 0x1000>,
@@ -333,6 +335,34 @@
};
};
+ gsbi8: gsbi@1a000000 {
+ compatible = "qcom,gsbi-v1.0.0";
+ cell-index = <8>;
+ reg = <0x1a000000 0x100>;
+ clocks = <&gcc GSBI8_H_CLK>;
+ clock-names = "iface";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ syscon-tcsr = <&tcsr>;
+
+ status = "disabled";
+
+ gsbi8_serial: serial@1a040000 {
+ compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
+ reg = <0x1a040000 0x1000>,
+ <0x1a000000 0x1000>;
+ interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&gcc GSBI8_UART_CLK>,
+ <&gcc GSBI8_H_CLK>;
+ clock-names = "core",
+ "iface";
+
+ status = "disabled";
+ };
+ };
+
ssbi: ssbi@500000 {
compatible = "qcom,ssbi";
reg = <0x500000 0x1000>;
@@ -417,6 +447,8 @@
#size-cells = <1>;
ranges;
+ status = "disabled";
+
gsbi1_spi: spi@16080000 {
compatible = "qcom,spi-qup-v1.1.1";
#address-cells = <1>;