diff options
| -rw-r--r-- | arch/x86/include/asm/msr.h | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h index 9397a319d165..8ee6fc633476 100644 --- a/arch/x86/include/asm/msr.h +++ b/arch/x86/include/asm/msr.h @@ -48,7 +48,7 @@ struct saved_msrs { #define EAX_EDX_VAL(val, low, high) ((low) | (high) << 32) #define EAX_EDX_RET(val, low, high) "=a" (low), "=d" (high) #else -#define DECLARE_ARGS(val, low, high) unsigned long long val +#define DECLARE_ARGS(val, low, high) u64 val #define EAX_EDX_VAL(val, low, high) (val) #define EAX_EDX_RET(val, low, high) "=A" (val) #endif @@ -79,7 +79,7 @@ static inline void do_trace_rdpmc(unsigned int msr, u64 val, int failed) {} * think of extending them - you will be slapped with a stinking trout or a frozen * shark will reach you, wherever you are! You've been warned. */ -static __always_inline unsigned long long __rdmsr(unsigned int msr) +static __always_inline u64 __rdmsr(unsigned int msr) { DECLARE_ARGS(val, low, high); @@ -113,9 +113,9 @@ do { \ __wrmsr((msr), (u32)((u64)(val)), \ (u32)((u64)(val) >> 32)) -static inline unsigned long long native_read_msr(unsigned int msr) +static inline u64 native_read_msr(unsigned int msr) { - unsigned long long val; + u64 val; val = __rdmsr(msr); @@ -125,7 +125,7 @@ static inline unsigned long long native_read_msr(unsigned int msr) return val; } -static inline unsigned long long native_read_msr_safe(unsigned int msr, +static inline u64 native_read_msr_safe(unsigned int msr, int *err) { DECLARE_ARGS(val, low, high); @@ -179,7 +179,7 @@ extern int wrmsr_safe_regs(u32 regs[8]); * CPU can and will speculatively execute that RDTSC, though, so the * results can be non-monotonic if compared on different CPUs. */ -static __always_inline unsigned long long rdtsc(void) +static __always_inline u64 rdtsc(void) { DECLARE_ARGS(val, low, high); @@ -196,7 +196,7 @@ static __always_inline unsigned long long rdtsc(void) * be impossible to observe non-monotonic rdtsc_unordered() behavior * across multiple CPUs as long as the TSC is synced. */ -static __always_inline unsigned long long rdtsc_ordered(void) +static __always_inline u64 rdtsc_ordered(void) { DECLARE_ARGS(val, low, high); @@ -224,7 +224,7 @@ static __always_inline unsigned long long rdtsc_ordered(void) return EAX_EDX_VAL(val, low, high); } -static inline unsigned long long native_read_pmc(int counter) +static inline u64 native_read_pmc(int counter) { DECLARE_ARGS(val, low, high); @@ -280,7 +280,7 @@ static inline int wrmsr_safe(unsigned int msr, u32 low, u32 high) __err; \ }) -static inline int rdmsrl_safe(unsigned int msr, unsigned long long *p) +static inline int rdmsrl_safe(unsigned int msr, u64 *p) { int err; |