diff options
| author | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2015-11-05 10:50:19 -0800 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2015-11-18 11:21:50 +0100 |
| commit | d72f9d919a60e5096105237a72f046b7a20fb53f (patch) | |
| tree | 49b1567648709da74c95288918d9b747d2471c7b /tools/perf/scripts/python | |
| parent | a03bc7cd633760ae0312327b6e30ec8fe962a798 (diff) | |
drm/i915: Allow 1 vblank to let Sink CRC calculation to start or stop.
According to VESA DP Spec, setting TEST_SINK_START (bit 0)
of TEST_SINK (00270h) "Stop/Start calculating CRC on the next frame"
So let's wait at least 1 vblank to really say the calculation
stopped or started.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions