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authorAtish Patra <atishp@rivosinc.com>2024-04-20 08:17:19 -0700
committerAnup Patel <anup@brainfault.org>2024-04-22 11:13:46 +0530
commit7dda24bacc05ae4e43b75aab347e4df07e002502 (patch)
treedbbd6e53da851f05833c974b33aad5489c1af061 /tools/perf/scripts/python
parent5d4acb7f2e1af1a5160870dbd11d2bd3a86007ed (diff)
drivers/perf: riscv: Read upper bits of a firmware counter
SBI v2.0 introduced a explicit function to read the upper 32 bits for any firmware counter width that is longer than 32bits. This is only applicable for RV32 where firmware counter can be 64 bit. Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Acked-by: Palmer Dabbelt <palmer@rivosinc.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Anup Patel <anup@brainfault.org> Signed-off-by: Atish Patra <atishp@rivosinc.com> Link: https://lore.kernel.org/r/20240420151741.962500-4-atishp@rivosinc.com Signed-off-by: Anup Patel <anup@brainfault.org>
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