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author | Suzuki K Poulose <suzuki.poulose@arm.com> | 2024-04-12 15:27:01 +0100 |
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committer | Suzuki K Poulose <suzuki.poulose@arm.com> | 2024-04-22 11:23:51 +0100 |
commit | 46bf8d7cd8530eca607379033b9bc4ac5590a0cd (patch) | |
tree | 4563b0573bdd3912631031fe40d807d58d94fbef /tools/perf/scripts/python | |
parent | 5eb3a0c2c52368cb9902e9a6ea04888e093c487d (diff) |
coresight: etm4x: Safe access for TRCQCLTR
ETM4x implements TRCQCLTR only when the Q elements are supported
and the Q element filtering is supported (TRCIDR0.QFILT). Access
to the register otherwise could be fatal. Fix this by tracking the
availability, like the others.
Fixes: f188b5e76aae ("coresight: etm4x: Save/restore state across CPU low power states")
Reported-by: Yabin Cui <yabinc@google.com>
Reviewed-by: Mike Leach <mike.leach@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Tested-by: Yabin Cui <yabinc@google.com>
Link: https://lore.kernel.org/r/20240412142702.2882478-4-suzuki.poulose@arm.com
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions