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authorRengarajan S <rengarajan.s@microchip.com>2025-05-13 14:45:57 +0530
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2025-05-21 14:44:20 +0200
commitfb410aa423b2e0bc82534e92dd4121a2046b609f (patch)
tree4707daf8f16b9283ac3a38f06fad26128404b519 /tools/perf/scripts/python/task-analyzer.py
parent7c970c657cf77ae0f230012138d8871ed573c7c7 (diff)
misc: microchip: pci1xxxx: Add GPIO Wakeup Support
The patch adds PIO asynchronous wakeup support while PIO PCIe Endpoint function is in D3 state. When such a wakeup event occurs, the PIO asserts a PIO_WAKE signal, which in turn triggers PCIe Wake signaling. This wake request should trigger the PCIe Host to take the PIO PCIe Endpoint function into the D0 device state. The device supports up to 96 PIOs distributed across three GPIO banks. During suspend and resume, the driver checks the status of each GPIO bank to determine if any GPIOs with wake masking enabled have triggered an event. Upon resume, PIOxx_STATUS register must be cleared by software explicitly to enable the detection of the next transition. Signed-off-by: Rengarajan S <rengarajan.s@microchip.com> Link: https://lore.kernel.org/r/20250513091557.3660-3-rengarajan.s@microchip.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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