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| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2022-09-09 11:53:53 +0200 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2022-09-18 14:53:34 +0200 |
| commit | 77643815b019d3e78b2ca028d701f95df58e7cf3 (patch) | |
| tree | cd092a410c5c4533f3cae9c17ee0542bf6092676 /tools/perf/scripts/python/mem-phys-addr.py | |
| parent | ff77ba0514855c106f8683b56a9a79b7464509c3 (diff) | |
arm64: dts: renesas: white-hawk: Add I2C0 and EEPROMs
Enable the I2C0 bus on the White Hawk CPU board, and describe the I2C
EEPROMs present on the White Hawk CPU and BreakOut boards.
Based on a larger patch in the BSP by Takeshi Kihara.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/d01cada6f2d3e44dd6cb26cfa8e4ce6382f1fbff.1662715538.git.geert+renesas@glider.be
Diffstat (limited to 'tools/perf/scripts/python/mem-phys-addr.py')
0 files changed, 0 insertions, 0 deletions