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author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2022-09-07 12:10:51 +0300 |
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committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2022-09-08 14:21:25 +0300 |
commit | daf195faa5a13972493d3a434e4d2e86ece722a5 (patch) | |
tree | e6c9dff66c4f79188e33d18032f184a392ca86f1 /tools/perf/scripts/python/exported-sql-viewer.py | |
parent | 5a72df3a3290137f6fdf34f23ac617ca35262c76 (diff) |
drm/i915: Set active dpll early for icl+
To make the fastboot checks at least somewhat sensible let's mark
the expected DPLL as the active one right after we finished the
state computation. Otherwise intel_pipe_config_compare() will
always be comparing things against NULL/0.
TODO: This is still not really right. If the previous commit
had to fall back to the other PLL then the comparisong will
now fail. I guess intel_pipe_config_compare() should rather
be comparing port_dplls[] instead. But to do that we really
should just unify every platform to use the port_dplls[]
approach whether they have any need for PLL fallbacks or not.
Acked-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220907091057.11572-12-ville.syrjala@linux.intel.com
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
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