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authorYang Chen <yang.chen@quantatw.com>2024-06-26 21:03:16 +0800
committerJoel Stanley <joel@jms.id.au>2024-08-22 13:07:11 +0930
commit931f133325d9d7a56741f0697508eae1f39808cf (patch)
treebd29909dbb1f3b997deb3afd5c367abc2bc52acb /tools/perf/scripts/python/export-to-sqlite.py
parent995d8fe0341ef206838fa88a021dd327e45c6521 (diff)
ARM: dts: aspeed: minerva: change the address of tmp75
Revise the address of tmp75 on I2C bus 1 from 0x48 to 0x4f due to design change. Signed-off-by: Yang Chen <yang.chen@quantatw.com> Link: https://lore.kernel.org/r/20240626130332.929534-2-yangchen.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
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