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| author | Takeshi Kihara <takeshi.kihara.df@renesas.com> | 2019-06-09 21:43:18 +0900 |
|---|---|---|
| committer | Simon Horman <horms+renesas@verge.net.au> | 2019-06-12 14:10:47 +0200 |
| commit | 06585ed38b6698bcaccd0f969e8117b2780d6355 (patch) | |
| tree | 3412bb6be2856724a14eb7af3e30eab7dde4d67a /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | ec0a286a339e0fff8666d48ccce48263488e64fb (diff) | |
arm64: dts: renesas: r8a77990: Fix register range of display node
Since the R8A77990 SoC uses DU{0,1}, the range from the base address to
the 0x4000 address is used.
This patch fixed it.
Fixes: 13ee2bfc5444 ("arm64: dts: renesas: r8a77990: Add display output support")
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions